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| programmable-logic:cmod-s6:start [2022/05/03 16:28] – Martha | programmable-logic:cmod-s6:start [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| + | ~~NOTOC~~ | ||
| + | | ||
| + | ====== Cmod S6 ====== | ||
| + | {{Digilent Infobox | ||
| + | | Store Page = https:// | ||
| + | | Manual = [[reference-manual]] | ||
| + | | Support = https:// | ||
| + | | Title = Cmod S6 | ||
| + | | Subtitle = Breadboardable Spartan-6 FPGA Module | ||
| + | | Header = Features | ||
| + | | Bullet = On-board Adept USB2 port for configuration, | ||
| + | | Header = Key Specifications | ||
| + | | Logic Cells = 3,840 (6 LUTs) | ||
| + | | Block RAM = 216Kb | ||
| + | | DSP Slices = 8 | ||
| + | | CMTs = 2 (4 DCMs and one PLL) | ||
| + | | Quad-SPI Flash = 16MB | ||
| + | | Header = Connectivity and On-board I/O | ||
| + | | GPIO = 46 signals brought to DIP pins | ||
| + | | LEDs = 4 | ||
| + | | Buttons = 2 | ||
| + | | Clock Inputs = 2 | ||
| + | | Header = Electrical | ||
| + | | Power = USB or power source connected \\ to DIP pin 24 (5-15V) | ||
| + | | Logic Level = 3.3V | ||
| + | | Header = Physical | ||
| + | | Width = 0.7 in | ||
| + | | Length = 2.6 in | ||
| + | | Header = Design Resources | ||
| + | | Master UCF File = {{: | ||
| + | | 3D Model = {{: | ||
| + | | Mechanical Drawing = {{: | ||
| + | | Header = Documentation | ||
| + | | Primary IC = [[https:// | ||
| + | | Reference Manual = [[programmable-logic/ | ||
| + | | Schematic = {{: | ||
| + | }} | ||
| + | {{page> | ||
| + | |||
| + | ===== Tutorials ===== | ||
| + | {{topic> | ||
| + | |||
| + | ---- | ||
| + | ===== Example Projects ===== | ||
| + | {{topic> | ||
| + | |||
| + | ---- | ||
| + | ===== Additional Resources ===== | ||
| + | * Cmod S6 factory-loaded demonstration project: {{: | ||
| + | * Cmod S6 Master UCF File for ISE designs: {{: | ||
| + | * {{: | ||
| + | |||
| + | ---- | ||
| + | |||
| + | {{tag> | ||

