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| - | ====== Nexys Video ====== | + | Wrong Namespace, don't edit this! |
| - | {{: | + | Go to [[nexys-video:start|here]] |
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| - | ----- | + | |
| - | ===== Introduction ===== | + | |
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| - | The Nexys Video board is a complete, ready-to-use digital circuit development platform based on the latest Artix-7™ Field Programmable Gate Array (FPGA) from Xilinx. With its high-capacity FPGA (Xilinx part number XC7A200T-1SBG484C) – the largest Artix-7 die at the time of writing, generous external memories, high-speed digital video ports, and 24-bit audio codec, make the Nexys Video is perfectly suited for audio and video processing applications. Several built-in peripherals, | + | |
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| - | The Artix-7 FPGA is optimized for high performance logic, and offers more capacity, higher performance, | + | |
| - | + | ||
| - | * 33,650 logic slices, each with four 6-input LUTs and 8 flip-flops | + | |
| - | * Close to 13 Mbits of fast block RAM (3x more than the Nexys 4 DDR) | + | |
| - | * Ten clock management tiles, each with phase-locked loop (PLL) | + | |
| - | * 740 DSP Slices | + | |
| - | * Internal clock speeds exceeding 450MHz | + | |
| - | * On-chip analog-to-digital converter (XADC) | + | |
| - | + | ||
| - | In addition to being compatible with Xilinx’s ISE toolset, The Nexys Video also works with Xilinx’s the new high-performance Vivado | + | |
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| - | ---- | + | |
| - | =====Revision History ===== | + | |
| - | + | ||
| - | The Nexys Video is currently on its initial release revision, Revision A. The revision of a particular board is indicated on the bottom side of the PCB next to the unique 6 Digit board number that begins with " | + | |
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| - | {{:nexys: | + | |
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| - | ---- | + | |
| - | ===== Documentation ===== | + | |
| - | + | ||
| - | * **Schematic** -- FIXME | + | |
| - | * PDF Schematic of the PCB generated by Altium | + | |
| - | * **Reference Manual** -- [[refmanual|Wiki]] [[refmanual.pdf|PDF]] | + | |
| - | * Technical description of the Nexys Video and all of its features. The Wiki page may contain more up-to-date information and fewer typos than the PDF. | + | |
| - | * **Getting Started Guide** -- [[gsg|Wiki]] | + | |
| - | * Great starting point for new Nexys Video owners. Includes the kit contents, instructions for running the out of box demo, and instructions for building a simple design. | + | |
| - | + | ||
| - | ===== Design Resources ===== | + | |
| - | + | ||
| - | * **Master XDC** -- [[|ZIP]] | + | |
| - | * This package contains the master XDC that defines the pin constraints for every device on the Nexys Video in Vivado. | + | |
| - | * **Master UCF** -- [[NexysVideo_Master_ucf.zip|ZIP]] | + | |
| - | * This package contains the master UCF that defines the pin constraints for every device on the Nexys Video in ISE. | + | |
| - | + | ||
| - | ===== Reference Projects ===== | + | |
| - | + | ||
| - | * **Basic User Demo** -- [[gpiodemo|Wiki]] | + | |
| - | * Basic demo that uses the onboard UART, Microphone, audio output, and GPIO devices. | + | |
| - | * **Nexys Video User Demo** -- [[UserDemo|Wiki]] The demo that is loaded in the QSPI flash at the factory. This complex design uses nearly every peripheral device on the Nexys Video. | + | |
| - | * **XADC Demo** -- [[xadcdemo|Wiki]] | + | |
| - | * Basic demo that shows a simple implementation with the Artix-7 XADC | + | |
| - | * **VGA Test Pattern with Mouse Overlay** -- [[vga-mouse-overlay-demo|Wiki]] | + | |
| - | * This project generates a test pattern on the VGA port and also displays a pointer that can be controlled with a mouse attached to the USB-HID port | + | |
| - | * **Getting Started with Microblaze** -- [[gsmb|Wiki]] | + | |
| - | * Follow this introduction on how to get started with Microblaze using Vivado IP Integrator. | + | |
| - | * **Getting Started with Microblaze Servers** -- [[gsmbs|Wiki]] | + | |
| - | * Follow this tutorial on how to get an echo server running with Microblaze using Vivado IP generator. | + | |
| - | + | ||
| - | ---- | + | |
| - | ===== FAQ ===== | + | |
| - | + | ||
| - | This list will be populated as common questions are identified on the [[http:// | + | |
| - | + | ||
| - | Currently no entries. | + | |
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| - | ---- | + | |
| - | ===== External Links ===== | + | |
| - | + | ||
| - | * [[http:// | + | |
| - | * [[http:// | + | |
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| - | [[nexys: | + | |

