Nexys 3
Reference Manual
Technical Support
Nexys 3
Spartan-6 FPGA Trainer Board
Features
- On-board USB2 port for programming & data transfer
Key Specifications
Logic Cells
2,278 slices (4 6-input LUTs
& 8 flip-flops each)
& 8 flip-flops each)
Block RAM
576Kbits
Cellular RAM
16Mbyte
DSP Slices
32
Clock Tiles
2 (4 DCMs & 2 PLLs)
Internal clock
500MHz+
Oscillator
100MHz CMOS
Quad-SPI Flash
16MB PCM non-volatile memory
Ethernet
10/100 PHY
Connectivity and On-board I/O
USB
USB-UART and USB-HID port
(for mouse/keyboard)
(for mouse/keyboard)
Pmod Connectors
4
VHDC
One connector
VGA
8-bit connector
Display
4-digit seven segment display
Switches
8
Buttons
5
LEDs
8
I/O
72 routed to expansion connectors
Electrical
Power
USB
5V (2.1mm coaxial) supply
5V (2.1mm coaxial) supply
Logic Level
3.3V
Physical
Width
4.8 in
Length
4.8 in
Design Resources
Master UCF File
EDK BSB Support Files
Board Verification
Note
The Nexys 3 is retired and no longer for sale.
The Nexys3 is a complete, ready-to-use digital circuit development platform based on the Xilinx Spartan-6 LX16 FPGA. The Spartan-6 is optimized for high performance logic, and offers more than 50% higher capacity, higher performance, and more resources as compared to the Nexys2’s Spartan-3 500E FPGA.
Tutorials
Example Projects
- Counter and Clock Divider
- Switch Controlled LEDs
- Use Flip-flops to Build a Clock Divider
- VGA Display Controller
Additional Resources
Demonstration projects
- VmodTFT Project – ZIP
- This demo project is for the VmodTFT and either the Nexys3 or the Atlys. It continuously samples the VmodTFT's touch panel for X, Y and pressure values and lights up the pixels touched.
Pmod Projects - Verilog
- PmodACL – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodACL.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodCLP – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodCLP.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodCLS – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodACL.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodENC – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodENC.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodGYRO – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodGYRO.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodHB5 – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodHB5.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodJSTK – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodJSTK.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodKYPD – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodKYPD.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodOLED – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodOLED.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
- PmodPS2 – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodPS2.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in Verilog.
Pmod Projects - VHDL
- PmodACL – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodACL.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodCLP – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodCLP.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodCLS – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodACL.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodENC – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodENC.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodGYRO – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodGYRO.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodHB5 – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodHB5.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodJSTK – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodJSTK.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodKYPD – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodKYPD.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodOLED – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodOLED.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.
- PmodPS2 – ZIP
- This zip file contains a Xilinx ISE demo project for the PmodPS2.
- This project was made for Xilinx ISE 14.2, targets the Nexys 3, and is written in VHDL.