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| zmod:scope:zmodadc1410libraryuserguide [2021/11/11 22:10] – ↷ Page moved from zmod:zmodadc:zmodadc1410libraryuserguide to zmod:scope:zmodadc1410libraryuserguide Arthur Brown | zmod:scope:zmodadc1410libraryuserguide [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| ====== 4. Background Knowledge ====== | ====== 4. Background Knowledge ====== | ||
| ===== 4.1. ZMODADC1410 IP Behaviour ===== | ===== 4.1. ZMODADC1410 IP Behaviour ===== | ||
| - | Basically, the ZMODADC1410 IP (labeled ZMOD_ADC [[/zmod/zmodadc/zmodadc1410libraryuserguide# | + | Basically, the ZMODADC1410 IP (labeled ZMOD_ADC [[zmod:scope:zmodadc1410libraryuserguide# |
| Using these registers, the ADC acquisition can be configured, started or stopped. The ADC acquisition is composed of the following steps: | Using these registers, the ADC acquisition can be configured, started or stopped. The ADC acquisition is composed of the following steps: | ||
| * **ADC output data is captured and decoded**. The ZmodADC1410’s ADC multiplexes its 2 channels on one 14-bit wide double data rate (DDR) parallel interface. The ZmodADC1410 IP demultiplexes the input data channel and resynchronizes the received data with its internal clock. \\ | * **ADC output data is captured and decoded**. The ZmodADC1410’s ADC multiplexes its 2 channels on one 14-bit wide double data rate (DDR) parallel interface. The ZmodADC1410 IP demultiplexes the input data channel and resynchronizes the received data with its internal clock. \\ | ||
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| The raw data exported by the ZMODADC1410 should be further analyzed considering the gain parameter setting used for the acquisition.\\ | The raw data exported by the ZMODADC1410 should be further analyzed considering the gain parameter setting used for the acquisition.\\ | ||
| - | For more details about the input ranges of the module, consult the [[/zmod/zmodadc/reference-manual# | + | For more details about the input ranges of the module, consult the [[zmod:scope:reference-manual# |
| * **Sample data is calibrated by applying calibration coefficients**. The ZMODADC1410 IP applies calibration coefficients over the digital values received from Analog to Digital converter, in order to compensate the offset and gain errors introduced by the ADC associated circuitry. For this, the IP provides calibration registers where the calibration coefficients are set. The ZmodADC1410 Library initialization functions available in the library reads the raw values for the gain and offset calibration coefficients from the Zmod’s nonvolatile memory, processes them, and configures the calibration registers. | * **Sample data is calibrated by applying calibration coefficients**. The ZMODADC1410 IP applies calibration coefficients over the digital values received from Analog to Digital converter, in order to compensate the offset and gain errors introduced by the ADC associated circuitry. For this, the IP provides calibration registers where the calibration coefficients are set. The ZmodADC1410 Library initialization functions available in the library reads the raw values for the gain and offset calibration coefficients from the Zmod’s nonvolatile memory, processes them, and configures the calibration registers. | ||
| * **The internal buffer is filled upon detecting a valid trigger condition**. The trigger module allows setting the trigger channel, trigger mode, trigger edge, trigger level and window position. The internal buffer has a maximum length of 2^14 - 1 samples and is 32 bits wide, accommodating both ZmodADC1410 channels. The internal buffer length must be set using the IP registers. | * **The internal buffer is filled upon detecting a valid trigger condition**. The trigger module allows setting the trigger channel, trigger mode, trigger edge, trigger level and window position. The internal buffer has a maximum length of 2^14 - 1 samples and is 32 bits wide, accommodating both ZmodADC1410 channels. The internal buffer length must be set using the IP registers. | ||
| * **Buffer data is transferred from the ZMODADC1410 IP internal buffer to system memory through a DMA engine**. The ZMODADC1410 IP reports when its internal buffer is full. While the internal buffer is full, no new acquisition is performed. The ZMODADC1410 Library initiates an AXIDMA-S2MM (AXIDMA receive) transfer, transferring data from the ZMODADC1410 IP internal buffer into a memory buffer allocated by ZMODADC1410 Library. The transferred length must be set using the ZmodADC1410 IP registers and the AXI DMA IP registers. The ZMODADC1410 IP can be configured to raise a Buffer Full interrupt, still this interrupt can only be handled by baremetal hardware platform.\\ | * **Buffer data is transferred from the ZMODADC1410 IP internal buffer to system memory through a DMA engine**. The ZMODADC1410 IP reports when its internal buffer is full. While the internal buffer is full, no new acquisition is performed. The ZMODADC1410 Library initiates an AXIDMA-S2MM (AXIDMA receive) transfer, transferring data from the ZMODADC1410 IP internal buffer into a memory buffer allocated by ZMODADC1410 Library. The transferred length must be set using the ZmodADC1410 IP registers and the AXI DMA IP registers. The ZMODADC1410 IP can be configured to raise a Buffer Full interrupt, still this interrupt can only be handled by baremetal hardware platform.\\ | ||
| - | For more details on ZmodADC1410 IP interface consult the [[https:// | + | For more details on ZmodADC1410 IP interface consult the [[https:// |
| Read more on [[# | Read more on [[# | ||
| ===== 4.2. Parameters Set===== | ===== 4.2. Parameters Set===== | ||

