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waveforms_-_rom_logic [2016/11/28 12:39] – [6. Example: PWM modulator] Mircea Dabacanwaveforms_-_rom_logic [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 //{{anchor:figure_3:Figure 3 ROM Logic implementing a Mealy State Machine.}}// //{{anchor:figure_3:Figure 3 ROM Logic implementing a Mealy State Machine.}}//
  
-===== 3. ROM logic User Interface in WaveForms 2015 =====+===== 3. ROM logic User Interface in WaveForms =====
  
 In the Pattern Generator, click the green “plus” sign and select ROM logic, as shown below. In the Pattern Generator, click the green “plus” sign and select ROM logic, as shown below.
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 ===== 5. Example: Binary counter with Count Enable input. ===== ===== 5. Example: Binary counter with Count Enable input. =====
  
-In the figure below, DIO8 is renamed CE and is used as Count Enable. DIO7…DIO0 are renamed c7…c0 and are the state/output bits of the 8-bit binary counter. Notice how X-es, signal names, and negated signal names are used in the Truth Table. The clock for the counter is 100kHz. The Truth Table was written in Excel (colored background area in sheet CounterWithCe8Bit of RomLogicTruthTables.xls) and copied in the appropriate tab.+In the figure below, DIO8 is renamed CE and is used as Count Enable. DIO7…DIO0 are renamed c7…c0 and are the state/output bits of the 8-bit binary counter. Notice how X-es, signal names, and negated signal names are used in the Truth Table. The clock for the counter is 100kHz. The Truth Table was written in Excel (colored background area in sheet CounterWithCe8Bit of {{:waveformsromlogic:RomLogicTruthTables.xlsx|RomLogicTruthTables.xlsx}}) and copied in the appropriate tab.
  
 Line 1 in the Truth Table (equivalent to 2<sup>8</sup>=256 expanded lines) means: when LSB c0=’0’: all bits c7…c1 keep value; c0 changes to ‘1’ only if CE=’1’. All other lines cover the cases when c0=’1’. Line 1 in the Truth Table (equivalent to 2<sup>8</sup>=256 expanded lines) means: when LSB c0=’0’: all bits c7…c1 keep value; c0 changes to ‘1’ only if CE=’1’. All other lines cover the cases when c0=’1’.
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 //{{anchor:figure_10:Figure 10.Pattern Generator prepared for PWM with static input.}}// //{{anchor:figure_10:Figure 10.Pattern Generator prepared for PWM with static input.}}//
  
-A 5-bit counter is implemented in a ROM logic object, as below, on DIO9…DIO5, renamed c4…c0. The Truth Table was written in Excel (sheet PWM in [[waveformsromlogic:RomLogicTrouthTables.xls]]) and copied in the Truth Table tab. The clock frequency is set to 1MHz.+A 5-bit counter is implemented in a ROM logic object, as below, on DIO9…DIO5, renamed c4…c0. The Truth Table was written in Excel (sheet PWM in {{:waveformsromlogic:RomLogicTruthTables.xlsx|RomLogicTruthTables.xlsx}}) and copied in the Truth Table tab. The clock frequency is set to 1MHz.
  
 {{:waveformsromlogic:RL_11_5BitCounterRomLogic.png|Figure 11. 5 bit counter ROM logic.}} {{:waveformsromlogic:RL_11_5BitCounterRomLogic.png|Figure 11. 5 bit counter ROM logic.}}
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 //{{anchor:figure_11:Figure 11. 5 bit counter ROM logic.}}// //{{anchor:figure_11:Figure 11. 5 bit counter ROM logic.}}//
  
-A second ROM logic (sheet PWM in RomLogicTrouthTables.xls) compares DIO9…DIO5 = c4…c0 = “5BitCounter” with DIO4…DIO0 = s4…s0 = ”Sample”. DIO10 = CY = ”CarryOut” is High when “Sample” is higher. Notice again how higher order bits (later lines in the Truth Table) override the lower order bits (earlier lines in the Truth Table).+A second ROM logic (sheet PWM in {{:waveformsromlogic:RomLogicTruthTables.xlsx|RomLogicTruthTables.xlsx}}) compares DIO9…DIO5 = c4…c0 = “5BitCounter” with DIO4…DIO0 = s4…s0 = ”Sample”. DIO10 = CY = ”CarryOut” is High when “Sample” is higher. Notice again how higher order bits (later lines in the Truth Table) override the lower order bits (earlier lines in the Truth Table).
  
 {{:waveformsromlogic:RL_12_5By5BitComparatorRomLogic.png|Figure 12. 5-by-5 bit Comparator ROM logic.}} {{:waveformsromlogic:RL_12_5By5BitComparatorRomLogic.png|Figure 12. 5-by-5 bit Comparator ROM logic.}}
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 //{{anchor:figure_14:Figure 14. Static PWM Scope capture.}}// //{{anchor:figure_14:Figure 14. Static PWM Scope capture.}}//
  
-Variable n-bit sample can be used as a modulator signal. For the second experiment, set a custom 5-bit Bus 1 in the Pattern Generator, to drive a sinus signal with 100 samples per period. Generate a .csv file, with 100 values of form (sheet SinusSamples in RomLogicTrouthTables.xls):+Variable n-bit sample can be used as a modulator signal. For the second experiment, set a custom 5-bit Bus 1 in the Pattern Generator, to drive a sinus signal with 100 samples per period. Generate a .csv file, with 100 values of form (sheet SinusSamples in {{:waveformsromlogic:RomLogicTruthTables.xlsx|RomLogicTruthTables.xlsx}}):
  
 $$sample_i=16+int(15*sin((2∙π∙i)/100))∈[1…31]$$ $$sample_i=16+int(15*sin((2∙π∙i)/100))∈[1…31]$$
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 //{{anchor:figure_18:Figure 18. Open a second pattern generator.}}// //{{anchor:figure_18:Figure 18. Open a second pattern generator.}}//
  
- A 5-bit PDM modulator is implemented in the PDM Accumulator ROM logic object, with DIO 9…DIO5 = a4…a0 as “Accumulator”, DIO4…DIO0 = s4…s0 as “Sample” and DIO10 as “CY” which is the PDM signal (copy colored background area in sheet PDM of RomLogicTrouthTables.xls and paste into the Truth Table).+ A 5-bit PDM modulator is implemented in the PDM Accumulator ROM logic object, with DIO 9…DIO5 = a4…a0 as “Accumulator”, DIO4…DIO0 = s4…s0 as “Sample” and DIO10 as “CY” which is the PDM signal (copy colored background area in sheet PDM of {{:waveformsromlogic:RomLogicTruthTables.xlsx|RomLogicTruthTables.xlsx}} and paste into the Truth Table).
  
 {{:waveformsromlogic:RL_19_OpenASecondPatternGenerator.png|Figure 19. Implementing a PDM in ROM logic.}} {{:waveformsromlogic:RL_19_OpenASecondPatternGenerator.png|Figure 19. Implementing a PDM in ROM logic.}}