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| vivado:ws_zynq [2016/01/21 19:55] – Andrew Holzer | vivado:ws_zynq [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| ===Hardware=== | ===Hardware=== | ||
| * **Digilent Zedboard or Zybo board** | * **Digilent Zedboard or Zybo board** | ||
| - | |||
| * **Micro USB Cable** | * **Micro USB Cable** | ||
| * Used for UART communications JTAG programming. | * Used for UART communications JTAG programming. | ||
| Line 35: | Line 34: | ||
| =====Tutorial===== | =====Tutorial===== | ||
| ====1. Starting the Workshop==== | ====1. Starting the Workshop==== | ||
| - | >1.1) Open the Xilinx University Program | + | >1.1) Open the Xilinx University Program |
| - | >1.2) Download the lab source files, which are unique to the Zybo and the Zedboard and the lab documents which are common between the two boards, under the 2015x Workshop Material section on the right. {{ :vivado:ws_zynq_1.png? | + | >1.2) Download the lab source files, which are unique to the Zybo and the Zedboard and the lab documents which are common between the two boards, under the 2015x Workshop Material section on the right. {{ :vivado:ws_zynq_2.png? |
| >1.3) Follow the labs as they guide you through the system design flow for Zynq. | >1.3) Follow the labs as they guide you through the system design flow for Zynq. | ||

