This is an old revision of the document!
Getting Started with Zynq and the Vivado IP Integrator
Warning
This page is a work in progress.
Prerequisites
- Vivado Installed
- Familiarity with Vivado
- Digilent Board Files
Introduction
This guide will explain the use of most of the major features of the IP Integrator design flow for a Zynq board. At the end of the demo, a simple design that receives data from on-board switches and controls LEDs will have been created.
1. Create a New IPI Project
1.1
Click Create Project.
1.2
The first page of this wizard summarizes the steps involved in creating a project. Click Next.
1.3
Here we will select the type of project we will be creating, select RTL Project and check the do not create sources now box. Click Next.
1.4
This screen selects the part targeted by the project. If you haven't yet installed Digilent's Board Files, return to the prerequisites section of this guide and follow the link to that tutorial, Vivado will then need to be restarted to load these files properly. Select the Boards tab, then find and select your board from the list. Click Next.
1.5
This screen summarizes selections chosen in the previous screens. Click Next to finish opening the new project.
2. The IP Integrator
2.1
A more complete run-down of the default Vivado work-flow can be found in Digilent's Getting Started with Vivado tutorial. This guide will be exclusively using the IP Integrator feature, which can be opened from the Flow Navigator on the right side of the window. Expand the IP Integrator tab and select Create Block Design.
2.2
Bullet-Point Overview of IPI
2.3
Bullet-Point Overview of Block Design Features
2.4
With a general understanding of the actions that can be taken in the IPI, a design can now be created.
3. Add the Zynq Block
3.1
The core of most IPI designs for a Zynq board is the Zynq block. Select Add IP, then search for and double click on Zynq. This block represents the on-chip hard processor of the Zynq.
3.2
Before doing anything else, select Run Block Automation in the green tab at the top of the Block Design screen. This button launches a dialog that will add several important required connections for the processor.
3.3
Make sure that the FIXED_IO and DDR connections will be created by checking the associated boxes. FIXED_IO represents all of the on-chip peripherals that can be enabled when configuring the Zynq block (more on this later), while the DDR connection represents the processor's connection to the on-board memory.
3.4
Make sure that the Board Preset will be applied by checking the associated box. This will take the configuration settings from the correct Digilent Board File and apply them to the Zynq block. Applying these settings manually is extremely tedious and easy to get wrong, which is why using Board Files is highly recommended for Zynq designs.
3.5
Click Finish to have Vivado add these connections and apply the preset. When this process is complete, the FIXED_IO and DDR connections can be seen in the block design, represented as ports directly connected to the Zynq block. Several other changes to the set of ports to and from the Zynq block can be seen.
4. Configure the Zynq Block
4.1
Additional changes can be made to the Zynq block's configuration, depending on the requirements of the project. The most common of these are the addition of a connection to the Zynq's interrupt controller, as well as the creation of additional clocks of different frequencies.
4.2
Overview Tabs
4.3
Expanded Overviews for tabs that require more than one image (interrupt, clocks, enable HP0/GP0, etc.)
4.4
Since the target design for this guide requires no major changes to the Zynq block's configuration, select Cancel or close the dialog. Changes are not saved except when Apply or Finish is selected.
5. Add Peripherals
5.1
In order to connect the Zynq processor to the board's RGB LEDs and Buttons, an AXI GPIO IP core needs to be added to the block design. There are two ways to add this block to the design, one of which will be used to add the RGB LED controller, while the other will be used to add the button controller.
5.2
The first way to connect a peripheral to the processor is the easiest, open the Board tab to the left of the screen. Right click on RGB LED and select make connection.
5.3
This launches a dialog that provides the different IP blocks that this port can be connected to. Select AXI GPIO.
5.4
This will place a general purpose input/output controller into the block design. Required configuration settings for the size of the GPIO channel will already be done, but additional options, like creating an interrupt port, or adding a second channel can be enabled by configuring the IP.
5.5
Since an AXI GPIO controller with a free channel - each block can control up to two different peripherals - already exists, when making a connection with the User Buttons port, the option of connecting the port to the second channel of axi_gpio_0 will be available. Select this option from the menu, then continue.
Tip
A Xilinx Design Constraints file can be used to constrain additional inputs and outputs, or in ways that were not anticipated by the creators of Digilent's board files. The Getting Started with Vivado tutorial covers using an XDC file in some detail, but when using the IPI, ensure that the name of the Port arrow in the block design has a name that matches the name of the port in the XDC file. Names of ports can be changed in the Properties screen.
6. Connect the AXI Blocks to the Zynq Block
6.1
At this point, the green bar at the top of the screen will have reappeared, this time saying Run Connection Automation. Click this.
6.2
Make sure that the axi_gpio_0 block is checked in the menu to the left. Several options are present here, including the clock that the AXI Interface will run off of. Click Finish to generate the AXI connection and its related blocks.
6.3
AXI is the communications protocol that is used by the Zynq processor to communicate with each of the peripheral controllers in the design. Each peripheral will be assigned an area of the Zynq's memory space that will be used to address each of its controller's registers. Adding a simple AXI interface to a design will also generate two new blocks, the AXI Interconnect, which defines how the signals are routed, and a reset controller, which will connect a processor rest to the resets of each AXI block and the interface. Exactly what these blocks are and how AXI works are outside of the scope of this guide.
7. Generate the Bitstream
7.1
At this point, a complete design has been created. Click the Validate Design button, or F6 on the keyboard to have Vivado confirm that everything looks good.
7.2
With a validated design, a bitstream can now be generated. The Getting Started with Vivado guide explains this process in a little more detail, but for now, click the Generate Bitstream button in the Flow Navigator.
7.3
Vivado will ask whether to run Synthesis and Implementation first. Click OK to allow this, as these steps both need to be run before a bitstream can be generated.
7.4
Vivado will ask how many jobs should be created to go through this process. This dialog allows the user to change how much of the resources of the computer Vivado is running on will be used. This process can take some time for complex designs, so it is recommended to devote as many resources as are possible.
7.5
With the bitstream generated, Vivado will ask what to do next. None of the options available are required for this guide, so click Cancel.
8. Launch Vivado SDK
8.1
Before Vivado SDK can be launched, it needs to be provided with a hardware handoff file, containing the bitstream and various other information about the peripherals installed in the design.
8.2
In the File dropdown, select Export then Export to SDK. This will launch a dialog that will tell Vivado where to place the necessary files, as well as whether or not the bitstream should be included.
8.3
Make sure that the Include Bitstream box is checked, and that the Export Location is <Local To Project>, then click OK.
8.4
Just below Export in the File dropdown, select Launch SDK.
8.5
The dialog that pops up will tell Vivado where to find the exported files, as well as where to create the SDK workspace. Leave both as <Local to Project>, then click OK.
8.6
SDK will now launch, and will import the hardware definition, creating a workspace containing only a hardware_hw project. This project contains the files exported from Vivado.
9. Create a New Project
8.1
With Vivado SDK open, a new Application Project needs to be created…
Finish Copy-Paste main.c & Programming