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vivado:getting_started:start [2020/03/09 18:00] – [Prerequisites] Arthur Brownvivado:getting_started:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 == 4. Open Hardware Manager == == 4. Open Hardware Manager ==
  
-This will open the Hardware Manager without an associated project. If connecting to and programming a device is all that is required by the user this is the button to use.+This will open the Hardware Manager without an associated project. If connecting to and programming a device is all that is required by the user, then this is the button to use.
  
 ==== 3. Creating a New Project ==== ==== 3. Creating a New Project ====
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     * Tools for creating Block Designs     * Tools for creating Block Designs
   * //Simulation//   * //Simulation//
-    * Allows a developer to verify the output of their deisgn prior to programming their device+    * Allows a developer to verify the output of their design prior to programming their device
   * //RTL Analysis//   * //RTL Analysis//
     * lets the developer see how the tools are interpreting their code     * lets the developer see how the tools are interpreting their code
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 ==== 6. Adding a Constraint File ==== ==== 6. Adding a Constraint File ====
  
-In order to connect HDL code with the physical pins of the FPGA, a constraint file needs to be added or created. Digilent has produced a Xilinx Design Constraint (XDC) file for each of our boards. Download the [[https://github.com/Digilent/digilent-xdc/archive/master.zip|ZIP Archive]] containing each of these master XDC files, then extract it in a location you will remember.+In order to connect HDL code with the physical pins of the FPGA, a constraint file needs to be added or created. Digilent has produced a Xilinx Design Constraint (XDC) file for each of our boards. Download [[https://github.com/Digilent/digilent-xdc/archive/master.zip|digilent-xdc-master.zip]], the ZIP Archive containing each of these master XDC files, then extract it in a location you will remember.
  
 <WRAP group> <WRAP group>
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 <WRAP column half> <WRAP column half>
 === 6.4 === === 6.4 ===
-Make sure that the selected XDC file has been added into the list of sources, then click //Finish//.+Make sure that the selected XDC file has been added into the list of sources, and that the //Copy constraint files into project// is checked, then click //Finish//. 
 + 
 +**Note:** //Leaving the Copy... box unchecked means that any editing done to the constraint file will be reflected in the original copy. Checking the box is highly recommended//
 </WRAP> </WRAP>
 <WRAP column half> <WRAP column half>
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 <WRAP group> <WRAP group>
 <WRAP column half> <WRAP column half>
-The next screen asks if the hardware server is local or remote. If the board is connected to the host computer choose local, if it is connected to another machine choose remote and fill in the //Host Name// and //Port// fields.\+The next screen asks if the hardware server is local or remote. If the board is connected to the host computer choose local, if it is connected to another machine choose remote and fill in the //Host Name// and //Port// fields.
  
 Click //Next// to continue. Click //Next// to continue.
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 You should now see one of the LEDs on your board blinking! You should now see one of the LEDs on your board blinking!
  
-Be sure to visit your board's resource center for more tutorials and demo projects. A link to each resource center can be found [[https://reference.digilentinc.com/reference/programmable-logic/start|here]].+Be sure to visit your board's resource center for more tutorials and demo projects. A link to each resource center can be found [[/programmable-logic/start|here]].
  
-{{tag>learn programmable-logic software tutorial vivado arty arty-a7 arty-s7 arty-z7 basys-3 cmod-a7 cmod-s7 cora-z7 genesys-2 nexys-4-ddr nexys-a7 nexys-video zybo-z7 zybo zedboard sword }}+{{tag>learn programmable-logic software tutorial vivado arty arty-a7 arty-s7 arty-z7 basys-3 cmod-a7 cmod-s7 cora-z7 genesys-2 nexys-4-ddr nexys-a7 nexys-video zybo-z7 zybo zedboard sword legacy}}