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test-and-measurement:analog-discovery-2:hardware-design-guide [2022/02/18 20:49] – mark pinout as figure 1 Arthur Browntest-and-measurement:analog-discovery-2:hardware-design-guide [2022/10/04 11:38] (current) – external edit 127.0.0.1
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-====== Analog Discovery 2 Hardware Design Guide (Under Construction) ======+====== Analog Discovery 2 Hardware Design Guide ======
 ~~TechArticle~~ ~~TechArticle~~
-<WRAP round todo> 
-== Under Construction == 
-</WRAP> 
  
 The Analog Discovery 2 is equipped with 13 test and measurement instruments providing the functionality of an entire benchtop worth of equipment in one device. The Oscilloscope, Waveform Generator, Logic Analyzer, Protocol Analyzer, Spectrum Analyzer, Power Supplies, and more provide a device that can become a pop-up electronics laboratory anywhere. The physical design of the Analog Discovery 2 provides BNC connectors or MTE cables for the analog inputs and outputs, MTE cables for the digital I/O, triggers, and power supplies, and a large removable and breadboardable design surface supporting a large variety of designs or projects.  The Analog Discovery 2 is equipped with 13 test and measurement instruments providing the functionality of an entire benchtop worth of equipment in one device. The Oscilloscope, Waveform Generator, Logic Analyzer, Protocol Analyzer, Spectrum Analyzer, Power Supplies, and more provide a device that can become a pop-up electronics laboratory anywhere. The physical design of the Analog Discovery 2 provides BNC connectors or MTE cables for the analog inputs and outputs, MTE cables for the digital I/O, triggers, and power supplies, and a large removable and breadboardable design surface supporting a large variety of designs or projects. 
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 ===== 1.1 Architectural Overview and Block Diagram ===== ===== 1.1 Architectural Overview and Block Diagram =====
  
-Analog Discovery 2's high-level block diagram is presented in [[analog_discovery_2:refmanual#figure_2|Fig. 2]] below. The core of the Analog Discovery 2 is the [[http://www.xilinx.com/|Xilinx®]] [[http://www.xilinx.com/products/silicon-devices/fpga/spartan-6/index.htm|Spartan®-6]] FPGA (specifically, the XC6SLX16-1L device). The WaveForms application automatically programs the Discovery’s FPGA at start-up with a configuration file designed to implement a multi-function test and measurement instrument. Once programmed, the FPGA inside the Discovery communicates with the PC-based WaveForms application via a USB 2.0 connection. The WaveForms software works with the FPGA to control all the functional blocks of the Analog Discovery 2, including setting parameters, acquiring data, and transferring and storing data.+Analog Discovery 2's high-level block diagram is presented in [[analog_discovery_2:refmanual#figure_2|Fig. 2]] below. The core of the Analog Discovery 2 is the [[https://www.xilinx.com/|Xilinx®]] [[https://www.xilinx.com/products/silicon-devices/fpga/spartan-6.html|Spartan®-6]] FPGA (specifically, the XC6SLX16-1L device). The WaveForms application automatically programs the Discovery’s FPGA at start-up with a configuration file designed to implement a multi-function test and measurement instrument. Once programmed, the FPGA inside the Discovery communicates with the PC-based WaveForms application via a USB 2.0 connection. The WaveForms software works with the FPGA to control all the functional blocks of the Analog Discovery 2, including setting parameters, acquiring data, and transferring and storing data.
  
  
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 $$ - 5.45V <  - 5V < V_{ACoutAWG\;HG} < 5V < 5.45V$$ $$ - 5.45V <  - 5V < V_{ACoutAWG\;HG} < 5V < 5.45V$$
-$$ - 1.36V < 1.25V < V_{ACoutAWG\;LG} < 1.25V < 1.36V\label{39}\tag{39}$$+$$ - 1.36V < - 1.25V < V_{ACoutAWG\;LG} < 1.25V < 1.36V\label{39}\tag{39}$$
  
  
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 $$at\;Low\;Gain:\;\;\;\frac{{2.72V}}{{{2^{14}}}} = 166\mu V$$ $$at\;Low\;Gain:\;\;\;\frac{{2.72V}}{{{2^{14}}}} = 166\mu V$$
-$$at\;High\;Gain:\;\;\;\;\;\frac{{10.9V}}{{{2^{14}}}} = 665\mu V\label{40}\tag{40}$$+$$at\;High\;Gain:\;\;\;\;\frac{{10.9V}}{{{2^{14}}}} = 665\mu V\label{40}\tag{40}$$
  
 The second term in equation \ref{38} shows the DC component (AWG offset), with a range of (for either LowGain or HighGain): The second term in equation \ref{38} shows the DC component (AWG offset), with a range of (for either LowGain or HighGain):
  
-$$ - 5.5V < 5V < V_{DCoutAWG} < 5V < 5.5V\label{41}\tag{41}$$+$$ - 5.5V < - 5V < V_{DCoutAWG} < 5V < 5.5V\label{41}\tag{41}$$
  
 AD8067 is supplied with $\pm 5.5V$; to avoid saturation the user should keep the sum of AC and DC components in \ref{38} to: AD8067 is supplied with $\pm 5.5V$; to avoid saturation the user should keep the sum of AC and DC components in \ref{38} to:
  
-$$ - 5.5V < 5V < V_{outAWG} < 5V < 5.5V\label{42}\tag{42}$$+$$ - 5.5V < - 5V < V_{outAWG} < 5V < 5.5V\label{42}\tag{42}$$
  
 Only **bolded** ranges are used in equations \ref{39}, \ref{41}, and \ref{42}, for providing tolerance margins. Only **bolded** ranges are used in equations \ref{39}, \ref{41}, and \ref{42}, for providing tolerance margins.
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 ====== 8. FPGA ====== ====== 8. FPGA ======
  
-The core of the Analog Discovery 2 is the Xilinx [[http://www.xilinx.com/products/silicon-devices/fpga/spartan-6/index.htm|Spartan-6]] FPGA circuit XC6SLX16-1L. The configured logic performs:+The core of the Analog Discovery 2 is the Xilinx [[https://www.xilinx.com/products/silicon-devices/fpga/spartan-6.html|Spartan-6]] FPGA circuit XC6SLX16-1L. The configured logic performs:
  
   * Clock management (12 MHz and 60 MHz for USB communication, 100 MHz for data sampling)   * Clock management (12 MHz and 60 MHz for USB communication, 100 MHz for data sampling)