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programmable-logic:zybo-z7:start [2022/09/16 11:47] – Alyssa Holzerprogrammable-logic:zybo-z7:start [2022/10/04 04:38] (current) – external edit 127.0.0.1
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 +~~NOTOC~~ 
 +       
 +====== Zybo Z7 ======
 +{{Digilent Infobox
 +| Store Page = https://digilent.com/shop/zybo-z7-zynq-7000-arm-fpga-soc-development-board/
 +| Manual = [[reference-manual]]
 +| Support = https://forum.digilentinc.com/forum/4-fpga/
 +| Title = Zybo Z7
 +| Subtitle = Zynq-7000 ARM/FPGA SoC Development Board
 +| Header = Features
 +| Bullet = Full support for Vivado, including tool integration, example projects and tutorials
 +| Bullet = 667MHz dual-core Cortex-A9 processor with tightly integrated Xilinx FPGA 
 +| Bullet = 1 GB DDR3L with 32-bit bus @ 1066 MHz
 +| Bullet = Wide range of USB, Ethernet, Video, and Audio connectivity
 +| Bullet = Pmod connectors for adding-on hardware devices
 +| Bullet = Pcam connector for attaching camera sensors with MIPI CSI-2 interface
 +| Bullet = Programmable from JTAG, Quad-SPI flash, and microSD card
 +| Header = Key FPGA Specifications
 +| Part Number = XC7Z020-1CLG400C (XC7Z010-1CLG400C*)
 +| Logic slices = 13,300 (4,400*)
 +| 6-input LUTs =  53,200 (17,600*)
 +| Flip-Flops = 106,400 (35,200*)
 +| Block RAM = 630 KB (270 KB*)
 +| DSP Slices = 220 (80*)
 +| Clock Resources = Zynq PLL with 4 outputs \\ 4 PLLs (2 PLLs*) \\ 4 MMCMs (2 MMCMs*) \\ 125 MHz external clock
 +| Internal ADC = Dual-channel, 1 MSPS
 +| Bullet = (* -7010 variant value in parentheses when different)
 +| Header = Connectivity and On-board I/O
 +| Video = HDMI Output\\ HDMI Input \\ Pcam connector
 +| Networking = Gigabit Ethernet
 +| USB = USB-UART \\ USB-JTAG Programmer \\ USB Host\OTG
 +| Pmod Connectors = 6 (5*)
 +| Switches = 4 Slide switches
 +| Buttons = 4 Push buttons \\ 2 MIO Push buttons 
 +| LEDs = 4 LEDs \\ 1 MIO LED \\ 2 RGB LEDs (1*)
 +| Bullet = (* -7010 variant value in parentheses when different)
 +| Header = Electrical
 +| Power = USB \\ 5V (2.5mm coaxial) supply
 +| Logic Level = 3.3V
 +| Header = Physical
 +| Width = 3.3 in (88 mm)
 +| Length = 4.8 in (122 mm)
 +| Header = Product Compliance
 +| HTC = 8471500150
 +| ECCN = 5A992.c
 +}}
  
 +{{page>reference-manual}} \\ \\
 + 
 +===== Documentation =====
 +  * [[programmable-logic/zybo-z7/reference-manual]]
 +  * [[learn/programmable-logic/doc/xilinx/zynq-datasheet]]
 +  * [[learn/programmable-logic/doc/xilinx/zynq-technical-reference-manual]]
 +  * [[learn/programmable-logic/doc/github/digilent-xdc]]
 +
 +  * [[software/petalinux/start]]
 +  * [[software/revision/start]]
 +  * [[software/sdsoc/start]]
 +  * [[programmable-logic/zybo-z7/migration-guide]]
 +
 +  * {{https://files.digilent.com/resources/programmable-logic/zybo-z7/zybo-z7-d1-sch.pdf|Zybo Z7 Revision D.1 Schematic}}
 +  * {{reference/programmable-logic/zybo-z7/zybo_z7_sch-public.pdf|Zybo Z7 Revision B.2 Schematic}}
 +
 +  * {{https://files.digilent.com/resources/programmable-logic/documents/MF17080V1-10000-G99_PCN.pdf|Product Change Notice - Fan}}
 +  * {{https://files.digilent.com/resources/programmable-logic/documents/RTL8211F_PCN.pdf|Product Change Notice - Ethernet PHY}}
 +  * {{https://files.digilent.com/resources/programmable-logic/documents/W25Q128JV_PCN.pdf|Product Change Notice - Flash Memory}}
 +
 +----
 +===== Tutorials =====
 +
 +  * [[programmable-logic:guides:installing-vivado-and-vitis]]
 +    * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards.
 +  * [[programmable-logic:guides:getting-started-with-ipi]]
 +    * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs.
 +  * [[programmable-logic:guides:getting-started-with-vivado]]
 +    * Walks through using Vivado to create a simple design that blinks a single LED.
 +  * [[learn/programmable-logic/tutorials/pmod-ips/start]]
 +    * Digilent Pmod IPs can be used to control connected Pmods from baremetal software.
 +    * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older.
 +
 +----
 +===== Example Projects =====
 +=== Demos Supporting Vivado and Vitis 2020.1 ===
 +  * [[./demos/dma-audio]]
 +  * [[./demos/hdmi]]
 +  * [[./demos/pmod-vga]]
 +  * [[./demos/xadc]]
 +=== Other Demos ===
 +  * [[/learn/programmable-logic/tutorials/zybo-z7-pcam-5c-demo/start]]
 +
 +  * Zybo Z7 OOB project: [[https://forum.digilentinc.com/topic/18148-zybo-z7-20-factory-demo-program/|Digilent Forum thread]]
 +  * Zybo Z7-20 project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum: [[https://forum.digilentinc.com/topic/20460-spi-memory-tester-ipi-bd-for-zynq/|Forum thread]]
 +
 +----
 +===== Additional Resources ===== 
 +  * [[https://digilent.s3-us-west-2.amazonaws.com/resources/whitepapers/EmbeddedVisionDemo.pdf|Embedded Vision Demo Whitepaper]]
 +    * Contains details of implementing an edge-detection algorithm using Vivado HLS.
 +    * Features the Zybo Z7-20 and [[add-ons:pcam-5c:start]].
 +
 +  * [[https://mautic.digilentinc.com/embedded-vision-workshop-download|Zybo Z7-10 HLS Video Processing Workshop]]
 +  * {{:reference:programmable-logic:zybo-z7:zybo_z7_dimensions.zip| Zybo Z7 Mechanical Drawings}}
 +
 +
 +  * [[https://vaxelinc.com/downloads/|VAXEL Resources]]
 +    * VAXEL-EZ boosts the productivity of algorithm verification processes on Digilent FPGA boards. The package includes a set of utility software that runs on Windows to facilitate tasks ranging from automation of FPGA synthesis to execution of tests. With VAXEL-EZ, no FPGA expertise is needed to take full advantage of the Digilent FPGA boards.
 +
 +----
 +
 +{{tag>programmable-logic programmable-logic-start zybo-z7 resource-center}}