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| programmable-logic:usb104a7:start [2022/09/12 11:33] – changed forum.digilentinc.com to forum.digilent.com jeff.greenberg_ni.com | programmable-logic:usb104a7:start [2022/10/04 04:38] (current) – external edit 127.0.0.1 | ||
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| + | ====== USB104 A7 ====== | ||
| + | ~~NOTOC~~ | ||
| + | |||
| + | {{Digilent Infobox | ||
| + | | Store Page = https:// | ||
| + | | Manual = [[reference-manual]] | ||
| + | | Support = https:// | ||
| + | | Title = USB104 A7 | ||
| + | | Subtitle = Artix-7 FPGA Development Board in PC/104 Form Factor | ||
| + | |||
| + | | Header = Features | ||
| + | | Bullet = Adept DPTI/DSPI interface for high speed host to FPGA data transfer over USB | ||
| + | | Bullet = Pmod and Zmod expansion connectors for system prototyping | ||
| + | | Bullet = Programmable through JTAG or QSPI | ||
| + | |||
| + | | Header = Key FPGA Specifications | ||
| + | | Part Number = XC7A100T-1CSG324I | ||
| + | | Logic Slices = 15,850 | ||
| + | | 6-Input LUTs = 63,400 | ||
| + | | Flip-Flops = 126,800 | ||
| + | | Block RAM = 607.5 KB | ||
| + | | DSP Slices = 240 | ||
| + | | Clock Resources = 6 PLLs \\ 6 MMCMs \\ 100 < | ||
| + | | Internal < | ||
| + | |||
| + | | Header = Connectivity | ||
| + | | SYZYGY Connectors = One SYZYGY Standard Interface | ||
| + | | Pmod Connectors = Three Pmod Ports | ||
| + | | USB = DPTI/DSPI data transfer interface \\ USB-UART \\ USB-JTAG programmer \\ Onboard USB Hub | ||
| + | |||
| + | | Header = Memories | ||
| + | | DDR3 = 512 < | ||
| + | | QSPI Flash = 16 < | ||
| + | |||
| + | | Header = On-board I/O | ||
| + | | Buttons = 2 | ||
| + | | LEDs = 4 | ||
| + | |||
| + | | Header = Electrical | ||
| + | | Power Inputs = 5V 6A (barrel jack) supply | ||
| + | | Pmod Connectors = 3.3V logic standard, 3.7V tolerant | ||
| + | | SYZYGY Connectors = 1.2V to 3.3V, up to 1.2A depending on power source \\ Automatically negotiated on board bring-up | ||
| + | |||
| + | | Header = Physical | ||
| + | | Form Factor = PC/104 | ||
| + | | Width = 3.775 in (95.89 mm) | ||
| + | | Length = 3.550 in (90.17 mm) | ||
| + | |||
| + | | Header = Product Compliance | ||
| + | | HTC = 8471809000 | ||
| + | | ECCN = EAR99 | ||
| + | }} | ||
| + | |||
| + | {{page> | ||
| + | ===== Documentation ===== | ||
| + | * [[reference-manual]] | ||
| + | * [[https:// | ||
| + | * [[https:// | ||
| + | * [[learn: | ||
| + | * [[learn: | ||
| + | |||
| + | ---- | ||
| + | ===== Design Files ===== | ||
| + | * [[https:// | ||
| + | * [[https:// | ||
| + | * {{: | ||
| + | * Includes an importable UCF file for loading the DDR3 pinout, and importable preconfigured MIG projects for 1.5V and 1.35V DDR3. | ||
| + | |||
| + | ---- | ||
| + | ===== Peripherals ===== | ||
| + | |||
| + | * The USB104 A7 is compatible with [[zmod: | ||
| + | |||
| + | * The USB104 A7 is compatible with modules that conform to Digilent' | ||
| + | |||
| + | ---- | ||
| + | ===== Tutorials ===== | ||
| + | |||
| + | * [[programmable-logic: | ||
| + | * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards. | ||
| + | * [[programmable-logic: | ||
| + | * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs. | ||
| + | * [[programmable-logic: | ||
| + | * Walks through using Vivado to create a simple design that blinks a single LED. | ||
| + | * [[learn/ | ||
| + | * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. | ||
| + | * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older. | ||
| + | |||
| + | ---- | ||
| + | ===== Example Projects ===== | ||
| + | * [[zmodadc]] | ||
| + | * [[zmoddac]] | ||
| + | * [[dspi]] | ||
| + | * [[https:// | ||
| + | |||
| + | ---- | ||
| + | {{tag> | ||

