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Nexys Video AXI PS/2 Keyboard Demo

Under Construction


Description

This project demonstrates how to use the Nexys Video's USB HID Host port and USB UART bridge with Microblaze. A custom AXI core is used to control interpret data received (and send data to) the board's USB HID port through a PS/2 interface. Vivado is used to build the demo's hardware platform, and Vitis is used to program the bitstream onto the board and to build and deploy a C application. When programmed onto the board, whenever the user presses a key on a keyboard connected to the USB HID port (J15, labeled “USB HOST”), a scan code is sent to the FPGA through a PS/2 interface. This scan code is read, converted to ASCII, and transmitted to the computer via the USB-UART bridge. In practice, this means that keys pressed on the keyboard connected to the Nexys Video are echoed over the serial connection.

To use this demo, the Nexys Video must be connected to a computer over MicroUSB, which must be running a serial terminal such as Tera Term or PuTTY.


Inventory


Download and Usage Instructions

First and foremost, releases - consisting of a set of files for download - are only compatible with a specific version of the Xilinx tools, as specified in the name of the release (referred to as a release tag). In addition, releases are only compatible with the specified variant of the board. For example, a release tagged “20/DMA/2020.1” for the Zybo Z7 is only to be used with the -20 variant of the board and Xilinx tools (Vivado and Vitis) version 2020.1.

The latest release version for this demo is highlighted in green.

Note: Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.

Release Tag Release Downloads Setup Instructions
PS2/2020.1-1 Release ZIP Downloads See Using the Latest Release, below
v2018.2-1 Release ZIP Downloads v2018.2-1 README

Note for Advanced Users: All demos for the Nexys Video are provided through the Nexys-Video repository on Github. Further documentation on the structure of this repository can be found on this wiki's Digilent FPGA Demo Git Repositories (Redirect) page.


Instructions on the use of the latest release can be found in this dropdown:

Using the Latest Release
This page has been moved, the new location is Using a Digilent FPGA Github Demo's Releases (2020.1).
Set up the Nexys Video

Plug the Nexys Video into the computer via the MicroUSB programming cables (one for communication, one for programming). Plug the power supply into the board and power the board on by flipping the power switch. Connect the USB keyboard.

Connect a serial terminal to the port associated with the Nexys Video. The demo uses the AXI UART-Lite IP's default baud rate of 9600.


This page has been moved, the new location is Using a Digilent FPGA Github Demo's Releases (2020.1).

At this point, the demo is now running on your board. Refer to the Description and Functionality sections of this document for more information on what it does.


Additional steps beyond here present how you can use the other archive provided in the release, containing the hardware project, to rebuild the Vivado project, and use a newly exported XSA file to update the platform in Vitis.


This page has been moved, the new location is Using a Digilent FPGA Github Demo's Releases (2020.1).

Functionality

Upon launch, the three keyboard LEDs - Caps Lock, Num Lock, and Scroll Lock will flash and a message appears on the terminal.

example1.jpg


The way the project works is pretty simple. When a button is pressed, it's corresponding make code - when pressed - and break code - when released - is received by the software and interpreted. After the interpretation is done, the corresponding character is sent via UART to the terminal and displayed.

example2.jpg


Most of the keyboard buttons have been implemented at least to some degree. All of the alphabet letters including uppercase are working. Uppercase can be set either by using any of the shift buttons or by pressing the caps-lock button.

The numbers 0-9 are also implemented however the special characters are not.

When keys that have not been implemented are pressed, “Unknown Key!!” is displayed on the terminal. Depending on the key, this text can be accompanied by misinterpreted key codes since some keys may produce longer make/break codes than others which can lead to identification errors.

example3.jpg

As an example, the output for “Page Down” button can be seen to the right:

example4.jpg


Additional Resources

All materials related to the use of the Nexys Video can be found on its Resource Center.

For a walkthrough of the process of creating a simple baremetal software project in Vivado and Vitis, see Getting Started with Vivado IP Integrator and Vitis (Redirect). Information on important parts of the GUIs, and indirect discussion of the steps required to modify, rebuild, and run this demo in hardware can also be found here.

For technical support, please visit the FPGA section of the Digilent Forum.


{{tag>project zybo-z7}}