Nexys A7 XADC Demo

This project is a Vivado demo using the Nexys A7-100T's analog-to-digital converter ciruitry, switches, LEDs, and seven-segment display, written in Verilog. When programmed onto the board, voltage levels between 0 and 1 Volt are read off of the JXADC header. The 16 User LEDs increment from right to left as the voltage difference between the selected channel's pins gets larger. The seven-segment display shows the voltage difference between the selected channel's pins in volts. SW0 and SW1 select which XADC channel is displayed.

See the Nexys A7's Reference Manual for more information about how the Artix 7 FPGA's XADC is connected to header JXADC.

Additional information on how this demo can be used can be found in appropriate READMEs, linked below.

• Nexys A7 with a MicroUSB Programming Cable
• Vivado installation compatible with the latest release of this demo (2020.1)
  • See Installing Vivado, Vitis, and Digilent Board Files for installation instructions.
• Wires, Breadboard and a Circuit to Test

The following releases of this demo can be used with instructions found in the corresponding READMEs in order to run the demo.

Releases are only compatible with the version of the Xilinx tools specified in the release version number. In addition, releases are only compatible with the specified variant of the board. For example, the v2020.1-1 release for Nexys A7-100T can only be used with Vivado 2020.1 and Nexys A7-100T variant of the board.

Note: The latest release tags for each variant and branch are highlighted in green.

Note for Advanced Users: All demos for the Nexys A7 are provided through the Nexys-A7 repository on Github. Further documentation on the structure of this repository can be found on this wiki's Digilent FPGA Demo Git Repositories (Redirect) page.

Instructions on the use of the latest release can be found in this dropdown:

Using the Latest Release

This page has been moved, the new location is Using a Digilent FPGA Github Demo's Releases (2020.1).

Set up the Nexys A7

Plug the Nexys A7 into the computer using the microUSB cable. The circuit and wires can be attached after the demo is already running.

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This page has been moved, the new location is Using a Digilent FPGA Github Demo's Releases (2020.1).

At this point, the demo is now running on your board. Refer to the Description and Functionality sections of this document for more information on what it does.

The demo reads analog data in from each enabled XADC channel (set using sw0 and sw1). The 7-Segment display shows the current voltage across the selected xadc pins. The LEDs turn on from right to left as the input voltage increases.

All materials related to the use of the Nexys A7 can be found on its Resource Center.

For a walkthrough of the process of creating a simple HDL project in Vivado, see Getting Started with Vivado for Hardware-Only Designs (Redirect). Information on important parts of the GUI, and indirect discussion of the steps required to modify, rebuild, and run this demo in hardware can also be found there.

For technical support, please visit the FPGA section of the Digilent Forum.

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