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programmable-logic:netfpga-sume:start [2022/09/12 11:26] – changed forum.digilentinc.com to forum.digilent.com jeff.greenberg_ni.comprogrammable-logic:netfpga-sume:start [2022/10/04 04:38] (current) – external edit 127.0.0.1
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 +~~NOTOC~~ 
 +    
 +====== NetFPGA-SUME ======
 +{{Digilent Infobox
 +| Store Page = https://digilent.com/shop/netfpga-sume-virtex-7-fpga-development-board/
 +| Manual = [[reference-manual]]
 +| Support = https://forum.digilentinc.com/forum/4-fpga/
 +| Title = NetFPGA-SUME
 +| Subtitle = Virtex-7 FPGA Development Board
 +| Header = Features
 +| Bullet = Micro USB Connector for JTAG programming and debugging (shared with USB-UART interface)
 +| Bullet = Xilinx CPLD XC2C512 for FPGA configuration from parallel flash
 +| Header = Key Specifications
 +| DDR3 = 2 4GB DDR3 SODIMMs \\ 64-bit wide buses at 850MHz
 +| QDRII+ = 3 72MB QDRII+ SRAMs \\ 36-bit wide buses at 500MHz
 +| Ethernet = 10/100 Mbps
 +| Header = Connectivity and On-board I/O
 +| SATA = 2 SATA III ports \\ (6gbps via GTH transceivers)
 +| SD = MicroSD card slot
 +| StrataFlash = 2 512MB StrataFlash \\ parallel flash modules
 +| QTH = QTH connector (8 GTH transceivers)
 +| FMC = 1 HPC FMC connector (10 GTH \\ transceivers and 68 user I/Os)
 +| Pmod Connectors = 1 12-pin Pmod port (8 user I/Os)
 +| Buttons = PROG push button for manual reset
 +| I2C = I2C Mux for controlling \\ on-board I2C buses
 +| Header = Electrical
 +| Power = Powered via 2x3/2x4 pin PCI \\ Express Auxiliary Power Connector
 +| Logic Level = 3.3V
 +| Header = Physical
 +| Width = 4.4 in
 +| Length = 9.8 in
 +| Header = Design Resources
 +| Getting Started Guide = [[https://github.com/NetFPGA/NetFPGA-public/wiki/NetFPGA-SUME-Getting-Started-Guide | Wiki]]
 +| Introduction Video = [[https://www.youtube.com/watch?v=Tjk9Z3Gnz1U | YouTube]]
 +| Master XDC = {{:reference:programmable-logic:netfpga-sume:sume_master.zip| }}
 +| Header = Documentation
 +| Primary IC = [[https://www.xilinx.com/products/silicon-devices/fpga/virtex-7.html | Virtex-7]] (XC7VX690T FFG1761-3)
 +| Schematic = {{:reference:programmable-logic:netfpga-sume:netfpga-sume_sch.pdf| }}
 +}}
 +
 +{{page>reference-manual}} \\ \\
 + 
 +===== Tutorials =====
 +----
 +{{topic>netfpga-sume +tutorial}}
 +
 +
 +===== Example Projects =====
 +----
 +{{topic>netfpga-sume +project}}
 +
 +===== Additional Resources =====
 +----
 +  * [[https://github.com/NetFPGA/NetFPGA-public/wiki/Home_NetFPGA-SUME| NetFPGA SUME wiki on GitHub]]
 +  * [[http://netfpga.org/2014/#/systems/1netfpga-sume/details/ | NetFPGA-SUME Website]]
 +  * [[https://github.com/NetFPGA/NetFPGA-public/wiki/Home_NetFPGA-SUME | NetFPGA-SUME Wiki]]
 +  * [[http://netfpga.org/ | NetFPGA Home]]
 +  * [[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=6866035 | NetFPGA-SUME Paper]]
 +  * [[https://www.xilinx.com/products/boards-and-kits/fmc-cards.html | Xilinx's list of FMC boards]]
 +  * [[https://www.element14.com/community/groups/development-tools/blog/2017/12/06/getting-started-with-digilent-netfpga-sume-a-xilinx-virtex-7-fpga-board-for-high-performance-computing-and-networking-systems | NetFPGA SUME Getting Started Guide]]
 +
 +{{tag>programmable-logic programmable-logic-start netfpga-sume resource-center}}