Differences

This shows you the differences between two versions of the page.

--- programmable-logic:guides:vivado-validate-block-design [2021/06/15 18:37] – [Validate a Block Design] Arthur Brown
+++ programmable-logic:guides:vivado-validate-block-design [2022/10/04 11:38] (current) – external edit 127.0.0.1
@@ Line 8: / Line 8: @@
 If there are no issues, a dialog will pop up that will tell you so. Click **OK** to continue.
-**Note:** //Some Zynq boards may produce critical warnings at this stage relating to PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY parameters. These warnings are ignorable and will not affect the functionality of the project. See the Hardware Errata section of your board's resource center for more information.//
+**Note:** //Some Zynq boards may produce critical warnings at this stage relating to PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY parameters. These warnings are ignorable and will not affect the functionality of the project. See the Hardware Errata section of your board's reference manual for more information.//
 </WRAP> <WRAP column half>
 {{ :learn:programmable-logic:tutorials:2020.1:validate-block-design:validate-design.png?600 |}}
 </WRAP> </WRAP>
 ----