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| programmable-logic:guides:vivado-validate-block-design [2021/05/14 23:04] – ↷ Page moved from reference:programmable-logic:guides:vivado-validate-block-design to programmable-logic:guides:vivado-validate-block-design Arthur Brown | programmable-logic:guides:vivado-validate-block-design [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| If there are no issues, a dialog will pop up that will tell you so. Click **OK** to continue. | If there are no issues, a dialog will pop up that will tell you so. Click **OK** to continue. | ||
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| + | **Note:** //Some Zynq boards may produce critical warnings at this stage relating to PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY parameters. These warnings are ignorable and will not affect the functionality of the project. See the Hardware Errata section of your board' | ||
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| {{ : | {{ : | ||
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