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programmable-logic:guides:vivado-add-microblaze [2021/06/15 00:44] – Arthur Brownprogrammable-logic:guides:vivado-add-microblaze [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 **Note:** //This section is intended for use with boards without a Zynq chip. For Zynq boards, the Zynq7 Processing System should be used instead.// **Note:** //This section is intended for use with boards without a Zynq chip. For Zynq boards, the Zynq7 Processing System should be used instead.//
 +
 +**Note:** //If you aren't sure whether your board has DDR memory, check the //Memory// column of the specification table on this site's [[programmable-logic:start]] page.//
  
 --> Follow the steps in this dropdown for boards without DDR memory # --> Follow the steps in this dropdown for boards without DDR memory #
 <WRAP group> <WRAP group>
 <WRAP group> <WRAP column half> <WRAP group> <WRAP column half>
-First, an external clock should be added to the block design, so that it can be used to generate any other clocks required by the design. Open the **Board** tab, and find the system clock. Right click on it and select **Connect Board Component**.+First, an external clock should be added to the block design, so that it can be used to generate any other clocks required by the design. Open the **Board** tab, and find the system clock. Right-click on it and select **Connect Board Component**.
 </WRAP> <WRAP column half> </WRAP> <WRAP column half>
 {{ :learn:programmable-logic:tutorials:2020.1:add-microblaze-processor:microblaze-1.png?600 |}} {{ :learn:programmable-logic:tutorials:2020.1:add-microblaze-processor:microblaze-1.png?600 |}}
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 Click **OK** to confirm your changes to the Clocking Wizard's settings. Click **OK** to confirm your changes to the Clocking Wizard's settings.
  
-**Note:** //This section can always be returned to later, as the addition of an additional clock can be performed any time before the hardware is built.//+If you aren't sure that you have all of the clocks you need, don't worry, you can always come back and add them by reconfiguring this IP. This task can be performed whenever in the design process it becomes necessary.
  
 </WRAP> <WRAP column half> </WRAP> <WRAP column half>
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 In the //Run Block Automation// dialog, several settings can be specified for how the Microblaze IP will be connected to the rest of the design: In the //Run Block Automation// dialog, several settings can be specified for how the Microblaze IP will be connected to the rest of the design:
   * **Local Memory** specifies how much block RAM memory will be dedicated to the processor. DDR-less designs require more memory, and the amount of memory necessary depends heavily on the size of the software application being run. 32KB is enough for many small applications.   * **Local Memory** specifies how much block RAM memory will be dedicated to the processor. DDR-less designs require more memory, and the amount of memory necessary depends heavily on the size of the software application being run. 32KB is enough for many small applications.
-  * **Cache Configuration** can help the speed of designs using DDR memory. It should be enabled when using DDR, and disabled otherwise.+  * **Cache Configuration** can help the speed of designs using DDR memory. It should be enabled when using DDR and disabled otherwise.
   * **Debug Module** allows you to specify the capabilities of the debugger. The default //Debug Only// option is recommended.   * **Debug Module** allows you to specify the capabilities of the debugger. The default //Debug Only// option is recommended.
   * **Peripheral AXI Port** enables or disables the AXI master interface of the processor. It must be enabled to allow the processor to be connected to hardware peripherals.   * **Peripheral AXI Port** enables or disables the AXI master interface of the processor. It must be enabled to allow the processor to be connected to hardware peripherals.
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 **Note:** //Settings not present in this list are out of the scope of this guide, and can safely be left as their default.// **Note:** //Settings not present in this list are out of the scope of this guide, and can safely be left as their default.//
  
-Confirm that the settings meet your design requirements. To rerun Block Automation, each IP created by it must first be deleted from the design. Click **OK** to continue.+Confirm that the settings meet your design requirements. It should be noted that while it is possible to change these settings manually later (for example, by manually adding an AXI INTC IP and connecting it to the processor), the easiest way to do so will be to clear the Microblaze processor out of your block design and restart the process of adding the processor. This is to say, the settings chosen here are important. Getting them right the first time will save you time in the long run. 
 + 
 +Click **OK** to continue.
 </WRAP> <WRAP column half> </WRAP> <WRAP column half>
 {{ :learn:programmable-logic:tutorials:2020.1:add-microblaze-processor:microblaze-14.png?600 |}} {{ :learn:programmable-logic:tutorials:2020.1:add-microblaze-processor:microblaze-14.png?600 |}}
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 **Note:** //Settings not present in this list are out of the scope of this guide, and can safely be left as their default.// **Note:** //Settings not present in this list are out of the scope of this guide, and can safely be left as their default.//
 +
 +Confirm that the settings meet your design requirements. It should be noted that while it is possible to change these settings manually later (for example, by manually adding an AXI INTC IP and connecting it to the processor), the easiest way to do so will be to clear the Microblaze processor out of your block design and restart the process of adding the processor. This is to say, the settings chosen here are important. Getting them right the first time will save you time in the long run.
  
 **Important!** When working with multiple clocks in a design (as happens to always be the case when working with the MIG) it is important to verify that you are picking the correct //Clock Connection// from the dropdown. In the screenshot to the right, the 100 MHz clk_out1 from a clocking wizard is chosen. You may instead wish to run your design off of ui_clk itself. Do not select the system clock input to the MIG. **Important!** When working with multiple clocks in a design (as happens to always be the case when working with the MIG) it is important to verify that you are picking the correct //Clock Connection// from the dropdown. In the screenshot to the right, the 100 MHz clk_out1 from a clocking wizard is chosen. You may instead wish to run your design off of ui_clk itself. Do not select the system clock input to the MIG.
  
-Confirm that the settings meet your design requirements - manually undoing and redoing these steps can be tedious and error-prone. To rerun Block Automation, each IP created by it must first be deleted from the design. Click **OK** to continue.+Click **OK** to continue.
 </WRAP> <WRAP column half> </WRAP> <WRAP column half>
 {{ :programmable-logic:guides:block-automation.png?600 |}} {{ :programmable-logic:guides:block-automation.png?600 |}}