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Adding DDR Memory to a Microblaze Design
When creating a design with DDR, it's best to add the DDR interface first, as it is typically also used to generate the clock/s that will be used by the rest of your design.
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In the Board tab, right click on the DDR interface and select “Auto Connect”. This process will add a MIG and the external DDR interface to the design. Two clock pins are also created, which will need to be modified. |
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Delete the “clk_ref_i” pin. This can be accomplished either by right-clicking on the pin and selecting delete or by selecting and pressing the delete key. |
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Verify that the “ui_addn_clk_0” pin has a frequency near 200 MHz by selecting it and looking at the “Frequency” value in the “Block Pin Properties” pane. |
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Manually connect the “ui_addn_clk_0” pin to the “clk_ref_i” pin by clicking and dragging from one to the other. |
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It's important to note that the “sys_clk_i” pin will not be constrained by the board files, and you will need to add a constraint file to map it to the corresponding pin location on the FPGA.
- Open this dropdown to learn how to add your board's master XDC and constrain the clock
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Next, the MIG's reset pin will be connected to the board's reset button. Click “Run Connection Automation” in the green bar at the top of the window. |
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In the list to the left side of the dialog that pops up, make sure that the “sys_rst” box is checked. Click OK to connect the reset to the corresponding board part interface. |
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- Open this dropdown if your MIG has a "device_temp_i" port
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If your MIG block has a “device_temp_i” port, it means that the MIG is not using the chip's XADC analog-to-digital converter feature. We'll ground this port to prevent any warnings that it may throw. Add a “Constant” IP to the design.
Double click on the block to open it's configuration wizard and modify it to have a Value of “0” and a Width of “12”.
Connect its output port to the “device_temp_i” port on the MIG.
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At the end of this process, the block design will look something like this: |
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