Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision		Previous revision
programmable-logic:guides:microblaze-adding-ddr [2021/06/08 16:46] – [Other MIG Ports] Arthur Brownprogrammable-logic:guides:microblaze-adding-ddr [2022/10/04 11:38] (current) – external edit 127.0.0.1
Line 1: Line 1:
 ====== Adding DDR Memory to a Microblaze Design ====== ====== Adding DDR Memory to a Microblaze Design ======
-===== Add the MIG IP and Connect its Input and Output Ports =====+ 
 +===== Add the MIG IP ===== 
 +/*add_the_mig_ip*/
 When creating a design with DDR, it's best to add the DDR interface first, as it is typically also used to generate the clock or clocks that will be used by the rest of your design. When creating a design with DDR, it's best to add the DDR interface first, as it is typically also used to generate the clock or clocks that will be used by the rest of your design.
  
Line 38: Line 40:
 ---- ----
  
-<columns>+<columns 100% 50%>
 Find the set_property and create_clock constraints for your board's 100 MHz input clock, uncomment them by removing the ''#'' at the start of each line, and change the name of the //port// that they are constraining to ''sys_clk_i'', to match the name of the port in the block design. Find the set_property and create_clock constraints for your board's 100 MHz input clock, uncomment them by removing the ''#'' at the start of each line, and change the name of the //port// that they are constraining to ''sys_clk_i'', to match the name of the port in the block design.
  
Line 74: Line 76:
 {{add-const.png?600|}} {{add-const.png?600|}}
 </columns> </columns>
 +----
 <columns 100% 50%> <columns 100% 50%>
 Double click on the block to open it's configuration wizard and modify it to have a Value of "0" and a Width of "12". Double click on the block to open it's configuration wizard and modify it to have a Value of "0" and a Width of "12".
Line 80: Line 82:
 {{configure-const.png?600|}} {{configure-const.png?600|}}
 </columns> </columns>
 +----
 <columns 100% 50%> <columns 100% 50%>
 Connect its output port to the "device_temp_i" port on the MIG. Connect its output port to the "device_temp_i" port on the MIG.
Line 89: Line 91:
 ---- ----
  
 +===== Additional Clocks =====
 +If your design requires more clocks than just the ui_clk provided by the MIG, you will need to add a clocking wizard IP that is driven by the MIG's ui_clk.
 +
 +<columns 100% 50%>
 +Use the Add IP button to search for and add a Clocking Wizard to the design.
 +<newcolumn>
 +{{add-clocking-wizard-ip.png?600|}}
 +</columns>
 +----
 +<columns 100% 50%>
 +Manually connect the Clocking Wizard's clk_in1 and reset ports to the MIG's ui_clk and ui_clk_sync_rst ports, respectively.
 +<newcolumn>
 +{{connect-wizard.png?600|}}
 +</columns>
 +----
 +<columns 100% 50%>
 +Finally, double-click on the Clocking Wizard to open and configure it. The third tab, //Output Clocks// contains all of the settings required to specify how many clocks you need, and of what frequencies. The screenshot to the right shows the wizard configured to create a 100 MHz clk_out1 and a 50 MHz clk_out2.
 +
 +If your design requires additional clocks (such as for an ext_spi_clock pin), they should be added here.
 +<newcolumn>
 +{{configure-clocks.png?600|}}
 +</columns>
 +
 +**Note:** //If you aren't sure that you have all of the clocks you need, don't worry, you can always come back and add them by reconfiguring this IP. This task can be performed whenever in the design process it becomes necessary.//
 +----
 ===== MIG Success ===== ===== MIG Success =====
 <columns 100% 50%> <columns 100% 50%>
 At the end of this process, the block design will look something like this: At the end of this process, the block design will look something like this:
 <newcolumn> <newcolumn>
-{{mig-block-design-final.png?600|}}+{{connect-wizard.png?600|}}
 </columns> </columns>
 +----
 ===== Connect the MIG to the Microblaze Processor ===== ===== Connect the MIG to the Microblaze Processor =====
-FIXME +<columns 100% 50%> 
 +To connect the MIG's AXI interface to the processor, click the **Run Connection Automation** button in the green banner at the top of the block design. 
 +<newcolumn> 
 +{{ :programmable-logic:guides:run-connection-automation.png?600 |}} 
 +</columns> 
 +---- 
 +<columns 100% 50%> 
 +In the dialog that pops up, you will be presented with several options for interfaces that can be connected to other interfaces. Both the Microblaze's IC and DC ports, as well as the MIG's AXI port will appear. You should only run connection automation for one side of the connection - the S_AXI port, as shown in the screenshot to the right. Make sure that its box is checked. Check that the //Master interface// is set to "/microblaze_0 (Cached)", indicating that the microblaze local memory will act as a cache for the DDR memory, then click **OK** to make the connections. 
 +<newcolumn> 
 +{{ :programmable-logic:guides:connection-automation.png?600 |}} 
 +</columns>