Differences

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--- programmable-logic:genesys-zu:start [2022/02/17 11:41] – ↷ Links adapted because of a move operation Arthur Brown
+++ programmable-logic:genesys-zu:start [2022/10/04 04:38] (current) – external edit 127.0.0.1
@@ Line 94: / Line 94: @@
   * {{ :reference::programmable-logic:genesys-zu:genesys_zu-3eg_revd1_sch_public.pdf |Genesys ZU-3EG Schematic Rev D.1}}
   * {{ :reference::programmable-logic:genesys-zu:genesys_zu-5ev_sch_public.pdf |Genesys ZU-5EV Schematic Rev D.1}}
-  * [[https://www.xilinx.com/support/documentation/data_sheets/ds890-ultrascale-overview.pdf|Xilinx Ultrascale Architecture and Product Data Sheet: Overview]]
+  * [[https://docs.xilinx.com/v/u/en-US/ds890-ultrascale-overview|Xilinx Ultrascale Architecture and Product Data Sheet: Overview]]
 ----
 ===== Guides =====
-  * [[vivado:installing-vivado:start|]]
+  * [[programmable-logic/guides/installing-vivado-and-vitis]]
     * **Note:** //When installing Vivado, make sure to include support for Zynq Ultrascale+ parts.//
-  * [[vivado:getting-started-with-ipi:start|]]
+  * [[programmable-logic/guides/getting-started-with-ipi]]
     * **Note:** //This guide was originally written for non-Ultrascale Zynq boards and boards using Microblaze. The flow for Ultrascale Zynq is largely the same as non-Ultrascale Zynq. The "Zynq Ultrascale+ MPSoC" IP core should be used in place of the "ZYNQ7 Processing System"//