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programmable-logic:genesys-zu:demos:hdmi [2022/02/17 19:41] – ↷ Page moved and renamed from learn:programmable-logic:tutorials:genesys-zu-5ev-demo-hdmi:start to programmable-logic:genesys-zu:demos:hdmi Arthur Brownprogrammable-logic:genesys-zu:demos:hdmi [2022/10/04 11:38] (current) – external edit 127.0.0.1
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   * When only the HDMI TX port is connected, the project enters in standalone mode, generating a color bar on the display.    * When only the HDMI TX port is connected, the project enters in standalone mode, generating a color bar on the display. 
   * From the menu, the color bar can be forced to re-appear on the display.   * From the menu, the color bar can be forced to re-appear on the display.
-  * The resolution can be changed on the fly, but the user needs to make sure that he is using the correct pixel clock. More information on how to calculate the correct clock for the desired resolution can be found in the [[https://www.xilinx.com/support/documentation/ip_documentation/v_hdmi_tx_ss/v3_1/pg235-v-hdmi-tx-ss.pdf|HDMI TX Subsytem]] Product Guide Chapter 4: Designing with the Subsystem, page 54, 55 and 56.   +  * The resolution can be changed on the fly, but the user needs to make sure that he is using the correct pixel clock. More information on how to calculate the correct clock for the desired resolution can be found in the [[https://docs.xilinx.com/r/3.1-English/pg235-v-hdmi-tx-ss/Clocking|Clocking section of the HDMI TX Subsytem Product guide]].   
   * After calculating the resolution, the IC46 (SI5342A-D-GM) needs to be reprogrammed accordingly. More information, together with two different example projects can be found in chapter [[programmable-logic:genesys-zu:reference-manual#5.1 GTH Reference Clocks*|5.1 GTH Reference Clocks*]] from the product reference manual.    * After calculating the resolution, the IC46 (SI5342A-D-GM) needs to be reprogrammed accordingly. More information, together with two different example projects can be found in chapter [[programmable-logic:genesys-zu:reference-manual#5.1 GTH Reference Clocks*|5.1 GTH Reference Clocks*]] from the product reference manual. 
   * The frame rate can be changed. The default value is 60 Hz.    * The frame rate can be changed. The default value is 60 Hz. 
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   * When both HDMI ports are connected, and there is a valid HDMI source, the project will automatically enter in pass-through mode and the Si5342A-D-GM will generate a jitter-attenuated reference clock to drive the HDMI Transmitter Subsystem with a phase-aligned version of the HDMI RX Subsystem HDMI RX TMDS Clock. Thus, the image from the HDMI source will be outputted  on the display.    * When both HDMI ports are connected, and there is a valid HDMI source, the project will automatically enter in pass-through mode and the Si5342A-D-GM will generate a jitter-attenuated reference clock to drive the HDMI Transmitter Subsystem with a phase-aligned version of the HDMI RX Subsystem HDMI RX TMDS Clock. Thus, the image from the HDMI source will be outputted  on the display. 
   * The pass-trough mode can be forced from the menu.   * The pass-trough mode can be forced from the menu.
-  * There is a GT & HDMI TX/RX log option that can be used for debugging. For example, for the HDMI TX log, each message is bonded to a specific interrupt. Thus, for debugging, the entire chain of events can be reiterated and compared with the one listed in the [[https://www.xilinx.com/support/documentation/ip_documentation/v_hdmi_tx_ss/v3_1/pg235-v-hdmi-tx-ss.pdf| HDMI TX Subsytem]] Product Guide, Appendix D: Application Software Development page 118 and 119.+  * There is a GT & HDMI TX/RX log option that can be used for debugging. For example, for the HDMI TX log, each message is bonded to a specific interrupt. Thus, for debugging, the entire chain of events can be reiterated and compared with the one listed in [[https://docs.xilinx.com/r/3.1-English/pg235-v-hdmi-tx-ss/Application-Software-Development| HDMI TX Subsytem Product Guide, Appendix D: Application Software Development]].
   * The EDID can be set and displayed.   * The EDID can be set and displayed.
   * The audio can be muted/unmuted and each audio channel can be reconfigured.    * The audio can be muted/unmuted and each audio channel can be reconfigured. 
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 ---- ----
-===== Download and Usage Instructions =====+===== Download/Cloning and Usage Instructions =====
  
  
-First and foremost, releases - consisting of a set of files for download - are only compatible with a specific version of the Xilinx tools, as specified in the name of the release (referred to as a //release tag//). In addition, releases are only compatible with the specified variant of the board. For example, a release tagged "20/DMA/2020.1" for the Zybo Z7 is only to be used with the -20 variant of the board and Vivado 2020.1.+First and foremost, any user can access this demo using two different approaches. The first one is by importing the release archive through Vitis GUI. This method doesn't have great portability, and for that, the user needs to go through extra steps and workarounds to build the project. The second one is by cloning the project. This is a fast and reliable method for running this demo, with only one downside for Windows systems. And that is the need to install a bash emulation tool to run all the specific commands. This document provides support for both methods. 
 +    
 +**Note:** //Releases - consisting of a set of files for download - are only compatible with a specific version of the Xilinx tools, as specified in the name of the release (referred to as a //release tag//). In addition, releases are only compatible with the specified variant of the board. For example, a release tagged "20/DMA/2020.1" for the Zybo Z7 is only to be used with the -20 variant of the board and Vivado 2020.1.//
  
 The latest release version for this demo is highlighted in green. The latest release version for this demo is highlighted in green.
  
-**Note:** //Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.//+**Important:** //Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.//
  
 ^ Board Variant   ^ Release Tag                  ^ Release Downloads                                                                                ^ Setup Instructions                       ^ ^ Board Variant   ^ Release Tag                  ^ Release Downloads                                                                                ^ Setup Instructions                       ^
 | Genesys ZU-5EV  | @#C0EEBD: 5EV/HDMI/2020.1-2  | [[https://github.com/Digilent/Genesys-ZU/releases/tag/5EV/HDMI/2020.1-2|Release ZIP Downloads]]  | See //Using the Latest Release//, below  | | Genesys ZU-5EV  | @#C0EEBD: 5EV/HDMI/2020.1-2  | [[https://github.com/Digilent/Genesys-ZU/releases/tag/5EV/HDMI/2020.1-2|Release ZIP Downloads]]  | See //Using the Latest Release//, below  |
  
-**Note for Advanced Users:** //All demos for the Genesys ZU are provided through the [[https://github.com/Digilent/Genesys-ZU|Genesys ZU]] repository on Github. Further documentation on the structure of this repository can be found on this wiki's [[programmable-logic:documents:git]] page.// 
 ---- ----
 Instructions on the use of the latest release can be found in this dropdown: Instructions on the use of the latest release can be found in this dropdown:
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 {{page>programmable-logic:guides:using-github-releases#baremetal_release_before_programming&noheader}} {{page>programmable-logic:guides:using-github-releases#baremetal_release_before_programming&noheader}}
 +
 +--> Set up the Genesys ZU-5EV #
 +
 +--> Set up the Genesys ZU-5EV for Standalone Mode#
 +Plug the HDMI cable into the HDMI TX port of the Genesys ZU. Connect one end of the cable to the HDMI TX port, and the other one to a DVI or HDMI port of your monitor. This cable does not need to be connected until the demo is running, but it is recommended to set it up now. Please see image bellow.
 +
 +{{ :learn:programmable-logic:tutorials:genesys-zu-5ev-demo-hdmi:genesys_zu_5ev_hdmi_setup_single_cable.png?400 |}}
 +<html><center></html>
 +//Figure 1: HDMI Cable Connections in standalone mode //
 +<html></center></html>
 +Plug the microUSB programming cable into the Genesys ZU-5EV's PROG/UART port.
 +<--
 +
 +
 +--> Set up the Genesys ZU-5EV for Pass-Through Mode#
 +Connect the HDMI cables to the HDMI ports of the Genesys ZU. Connect one end of the first cable to the HDMI TX port, and the other one to a DVI or HDMI port of your monitor. Then, connect one end of the second cable to the HDMI RX port, and the other end to your HDMI source. These cables do not need to be connected until the demo is running, but it is recommended to set them up now. Please see image bellow.
 +
 +{{ :learn:programmable-logic:tutorials:genesys-zu-5ev-demo-hdmi:genesys_zu_5ev_hdmi_setup_two_cables.png?400 |}}
 +<html><center></html>
 +//Figure 2: HDMI Cable Connections in pass-through mode //
 +<html></center></html>
 +Plug the microUSB programming cable into the Genesys ZU-5EV's PROG/UART port.
 +<--
 +<--
 +--> Launch the Vitis Baremetal Software Application#
 +
 +<WRAP group> <WRAP column half>
 +First, many applications require that a serial console is connected to the board, so that standard output (from print statements) can be viewed. For this purpose, a serial terminal should be used. Use a serial terminal application to connect to the board's serial port. Unless otherwise stated, Zynq designs use a baud rate of 115200 and Microblaze designs with an AXI UART Lite IP use a baud rate of 9600.
 +
 +**Note:** //While Vitis has a built in serial terminal included in its Debug view, it sends characters to a board on a line-by-line basis. Some software examples require the use of character-by-character reception of data. [[https://ttssh2.osdn.jp/index.html.en|Tera Term]] or [[https://www.chiark.greenend.org.uk/~sgtatham/putty/latest.html|PuTTY]] are recommended if you are not sure what will work.//
 +</WRAP> <WRAP column half>
 +{{ :learn:programmable-logic:tutorials:2020.1:launch-vitis-application:set-baud.png?600 |}}
 +</WRAP> </WRAP>
 +----
 +<WRAP group> <WRAP column half>
 +Browse for the //5ev_fsbl.elf// file. The hw platform comes without generating its boot components, so the user needs to manually select a valid boot elf file. Double Click on //platform.spr// → Browse to the project workspace folder that was previously selected, and double click on //5ev_fsbl// → //Release// → //5ev_fsbl.elf// → and then click //Open//.  
 +</WRAP> <WRAP column half>
 +{{ :learn:programmable-logic:tutorials:genesys-zu-5ev-demo-hdmi:zu_5ev_browse_fsbl_vitis_project.png|}}
 +</WRAP> </WRAP>
 +----
 +<WRAP group> <WRAP column half>
 +Click on //Project// and select //Build Project//, or simply press //CTRL+B//. The build should take a couple of seconds.
 +</WRAP> <WRAP column half>
 +{{ :learn:programmable-logic:tutorials:genesys-zu-5ev-demo-hdmi:zu_5ev_build_vitis_project.png|}}
 +</WRAP> </WRAP>
 +----
 +<WRAP group> <WRAP column half>
 +In the //Explorer// pane at the left side of the screen, right click on the application or system project that is to be run, and select //Run as -> 1 Launch on Hardware //. The FPGA will be programmed with the bitstream, the ELF file previously selected is loaded into system memory, and the application project will begin to run. You will need to click back over to the //Vitis Serial Terminal// from the //Console// tab.
 +
 +**Note:** //Once the project has been run at least once, you can use the green run button ({{:learn:programmable-logic:tutorials:2020.1:launch-vitis-application:run-button.png?nolink|}}) in the toolbar at the top of the screen to program the board instead.//
 +</WRAP> <WRAP column half>
 +{{ :learn:programmable-logic:tutorials:genesys-zu-5ev-demo-hdmi:zu_5ev_launch_hardware_vitis_projects.png|}}
 +</WRAP> </WRAP>
 +<--
 +----
 +At this point, the demo is now running on your board. Refer to the [[#description|Description]] section of this document for more information on what it does.
 +----
 +Additional steps beyond here present how you can use the other archive provided in the release, containing the hardware project, to rebuild the Vivado project, and use a newly exported XSA file to update the platform in Vitis.
 +----
 +In order to modify and switch out the hardware platform for a baremetal demo, you should first open the Vivado project from the release. Extract the previously downloaded '*.xpr.zip' file. 
 +----
 +
 +{{page>programmable-logic:guides:using-github-releases#baremetal_update_specification&noheader}}
 +</WRAP>
 +<--
 +
 +----
 +Instructions on the cloning and the use of the latest git project can be found in this dropdown:
 +
 +--> Using the Genesys ZU repository#
 +<WRAP group>
 +
 +**Important:** //These steps are only to be used with Xilinx tools versions 2020.1 and newer.//
 +
 +**Note for Advanced Users:** //Further documentation on the structure of the [[https://github.com/Digilent/Genesys-ZU|Genesys ZU]] repository can be found on this wiki's [[programmable-logic:documents:git]] page.//
 +----
 +
 +--> Git for Windows#
 +
 +<WRAP group> <WRAP column half>
 +For Windows OS we need to emulate Git from command line. For this please download and install [[https://gitforwindows.org|Git SCM for Windows]].
 +</WRAP> <WRAP column half>
 +{{ :programmable-logic:genesys-zu:demos:gitbashwindowsos.png?600 |}}
 +</WRAP> </WRAP>
 +<--
 +--> Clone the project repository and initialize all the submodules.#
 +
 +<WRAP group> <WRAP column half>
 +First, copy the https or ssh URL  from [[https://github.com/Digilent/Genesys-ZU|Genesys ZU]] repository.
 +
 +
 +</WRAP> <WRAP column half>
 +{{ :programmable-logic:genesys-zu:demos:genesyszurepo.png?600|}}
 +</WRAP> </WRAP>
 +----
 +<WRAP group> <WRAP column half>
 +Create a folder, in a location of your choice on the computer. Right-click from within and select ''//Git Bash Here//''
 + 
 +</WRAP> <WRAP column half>
 +{{ :programmable-logic:genesys-zu:demos:gitbashlaunch.png?600|}}
 +</WRAP> </WRAP>
 +----
 +<WRAP group> <WRAP column half>
 +First, we have to clone the root repository. For this, please run the fallowing command.
 +<code>git clone [email protected]:Digilent/Genesys-ZU.git</code>
 +Navigate inside the repository.
 +<code>cd Genesys-ZU/</code>
 +
 +We use se the following commands within the root repository to check out the "5ev/hdmi/demo" branch, and update the submodules to the correct commits: 
 +<code>git checkout 5ev/demo/hdmi</code>
 +<code>git submodule init</code>
 +<code>git submodule update</code>
 +Navigate to the "../sw" folder.
 +<code>cd sw/</code>
 +Initialize and update the embeddedsw submodule.
 +<code>git submodule init</code>
 +<code>git submodule update</code>
 +
 +</WRAP> <WRAP column half>
 +{{ :programmable-logic:genesys-zu:demos:gotogihub_14.png?600|}}
 +</WRAP> </WRAP>
 +----
 +<--
 +--> Recreate a Vitis Workspace from Source #
 +<WRAP group>
 +**Important:** //When selecting a workspace to open Vitis into, the use of the extracted software archive's "ws" folder is recommended. The use of this folder simplifies the process of invoking the script that recreates the projects.//
 +
 +{{page>programmable-logic:guides:vitis-launch&noheader}}
 +
 +<WRAP group> <WRAP column half>
 +With Vitis open, in the menu bar at the top of the window, use the **Xilinx -> XSCT Console** option to launch the Xilinx Software Command-line Tool.
 +</WRAP> <WRAP column half>
 +{{ :reference:programmable-logic:guides:using-releases:open-xsct.png?600 |}}
 +</WRAP> </WRAP>
 +----
 +<WRAP group> <WRAP column half>
 +In the XSCT Console, if you used the software archive's ws folder, enter the command below to run a script that recreates each of the projects and platforms associated with the demo from their sources.
 +<code>source [getws]/../src/checkout.tcl</code>
 +
 +If you did not use the ws folder, find the path to the extracted archive, and enter the commands below. Note that all slashes in the path must be forward slashes ("/") or the entire path must be enclosed in curly braces ("{}").
 +<code>source (path to software)/src/checkout.tcl</code>
 +
 +The checkout process may some time, though not more than a few minutes, as the projects are recreated and built. When complete, the "xsct%" prompt will reappear.
 +</WRAP> <WRAP column half>
 +{{ :reference:programmable-logic:guides:source-checkout.png?600 |}}
 +</WRAP> </WRAP>
 +----
 +</WRAP>
 +<--
  
 --> Set up the Genesys ZU-5EV # --> Set up the Genesys ZU-5EV #