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| programmable-logic:genesys-2:start [2022/09/12 10:57] – changed forum.digilentinc.com to forum.digilent.com jeff.greenberg_ni.com | programmable-logic:genesys-2:start [2022/10/04 04:38] (current) – external edit 127.0.0.1 | ||
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| + | ~~NOTOC~~ | ||
| + | | ||
| + | ====== Genesys 2 ====== | ||
| + | {{Digilent Infobox | ||
| + | | Store Page = https:// | ||
| + | | Manual = [[reference-manual]] | ||
| + | | Support = https:// | ||
| + | | Title = Genesys 2 | ||
| + | | Subtitle = Kintex-7 FPGA Development Board | ||
| + | | Header = Features | ||
| + | | Bullet = Programmable over JTAG and Quad-SPI Flash | ||
| + | | Bullet = On-chip analog-to-digital converter (XADC) | ||
| + | | Header = Key Specifications | ||
| + | | FPGA Part # = XC7K325T-2FFG900C | ||
| + | | Logic Cells = 50,950 logic slices \\ (4 6-input LUTs & 8 flip-flops each) | ||
| + | | Block RAM = 16 Mbits | ||
| + | | DSP slices = 840 | ||
| + | | CMTs = 10, each with PLL | ||
| + | | DDR3 = 1800Mbps with 32-bit data width | ||
| + | | Internal clock = 450 MHz+ | ||
| + | | Quad-SPI Flash = 16 MB | ||
| + | | Ethernet = 10/100/1000 PHY | ||
| + | | Header = Connectivity and On-board I/O | ||
| + | | Pmod Connectors = 5 Pmod ports | ||
| + | | VGA = 1 VGA connector | ||
| + | | HDMI = HDMI Sink and HDMI Source | ||
| + | | SD = microSD card connector | ||
| + | | USB = HID host for mouse, keyboard, \\ and USB MSD host for storage | ||
| + | | Audio = Audio codec with four 3.5mm jacks | ||
| + | | FMC Connector = Fully-populated 400-pin FMC \\ HPC connector w/ ten GTX lanes | ||
| + | | Switches = 8 | ||
| + | | Buttons = 6 | ||
| + | | Header = Electrical | ||
| + | | Power = 12V ±5 % external power only | ||
| + | | Header = Physical | ||
| + | | Width = 5.8 in | ||
| + | | Length = 6.8 in | ||
| + | }} | ||
| + | {{page> | ||
| + | |||
| + | ===== Documentation ===== | ||
| + | {{topic> | ||
| + | |||
| + | * {{/ | ||
| + | |||
| + | ---- | ||
| + | ===== Tutorials ===== | ||
| + | {{topic> | ||
| + | |||
| + | ---- | ||
| + | ===== Example Projects ===== | ||
| + | **Note:** //These example projects are supported in Vivado and Xilinx SDK 2016.4. No further updates are planned.// | ||
| + | |||
| + | {{topic> | ||
| + | |||
| + | ---- | ||
| + | |||
| + | ===== Additional Resources ===== | ||
| + | * [[programmable-logic: | ||
| + | * [[programmable-logic: | ||
| + | * {{: | ||
| + | * {{: | ||
| + | * {{: | ||
| + | |||
| + | ---- | ||
| + | |||
| + | {{tag> | ||

