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programmable-logic:eclypse-z7:start [2022/05/17 09:55] – [Documentation] Arthur Brownprogrammable-logic:eclypse-z7:start [2022/10/04 04:38] (current) – external edit 127.0.0.1
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 +~~NOTOC~~ 
 +    
 +====== Eclypse Z7 ======
 +{{Digilent Infobox
 +| Store Page = https://digilent.com/shop/eclypse-z7-zynq-7000-soc-development-board-with-syzygy-compatible-expansion/
 +| Getting Started = getting-started-guide
 +| Manual = [[reference-manual]]
 +| Support = https://forum.digilentinc.com/forum/4-fpga/
 +| Title = Eclypse Z7
 +| Subtitle = Zynq-7000 SoC Development Board with SYZYGY-compatible Expansion
  
 +| Header = Features
 +| Bullet = Full support for Vivado, including tool integration, example projects and tutorials
 +| Bullet = Out-of-the-box Petalinux support, including example projects and tutorials
 +| Bullet = 667MHz dual-core Cortex-A9 processor with tightly integrated Xilinx FPGA
 +| Bullet = 2 SYZYGY Standard Interfaces for high-speed data transfer in modular systems
 +| Bullet = 2 Pmod connectors for additional system modularity
 +| Bullet = 1 GB DDR3L with 32-bit bus @ 1066 MT/s
 +| Bullet = USB and Ethernet connectivity
 +| Bullet = Programmable from JTAG, Quad-SPI flash, and microSD card
 +
 +| Header = Key FPGA Specifications
 +| Part Number = XC7Z020-1CLG484C
 +| Logic Slices = 13,300
 +| 6-Input LUTs = 53,200
 +| Flip-Flops = 106,400
 +| Block RAM = 630 KB
 +| DSP Slices = 220
 +| Clock Resources = Zynq PLL with 4 outputs \\ 4 PLLs \\ 4 MMCMs \\ 125 <nowiki>MHz</nowiki> external clock
 +| Internal <nowiki>ADC</nowiki> = Dual-channel, 1 MSPS
 +
 +| Header = Connectivity
 +| SYZYGY Connectors = Two SYZYGY Standard Interfaces
 +| Pmod Connectors = Two Pmod Ports
 +| Ethernet = 10/100/1000 Mbps with Realtek PHY
 +| USB = USB-UART \\ USB-JTAG programmer \\ USB micro-AB Host/Device/OTG port
 +
 +| Header = Memories
 +| DDR3 = 1024 <nowiki>MB</nowiki> / 1066 MT/s
 +| QSPI Flash = 16 <nowiki>MB</nowiki>
 +| SD = microSD card connector
 +
 +| Header = On-board I/O
 +| Buttons = 2
 +| Tri-Color LEDs = 2
 +
 +| Header = Electrical
 +| Power Inputs = 12V 5A (barrel jack) supply
 +| Pmod Connectors = 3.3V logic standard, 5V tolerant
 +| SYZYGY Connectors = 1.2V to 3.3V, 2A budget shared by both connectors \\ Automatically negotiated on board bring-up
 +| FPGA Fan = Managed by Eclypse Platform MCU
 +| Header = Physical
 +| Width = 99 mm (3.9 in)
 +| Length = 160 mm (6.3 in)
 +| Header = Product Compliance
 +| HTC = 8471500150
 +| ECCN = 4A994.b
 +}}
 +
 +{{page>reference-manual}}
 +
 +This page is the resource center for the Eclypse Z7, where you will find all of Digilent’s support materials and documentation for the Eclypse, including fully open and customizable hardware designs, baremetal software examples, and Linux images.
 +
 +{{section>reference-manual#image_gallery}}
 +
 +\\ \\
 +
 +===== Getting Started =====
 +
 +  * [[programmable-logic/eclypse-z7/getting-started-guide]]
 +
 +===== Documentation =====
 +
 +  * [[programmable-logic/eclypse-z7/reference-manual]]
 +  * [[programmable-logic/eclypse-z7/git]]
 +  * [[https://docs.xilinx.com/v/u/en-US/ds180_7Series_Overview|Xilinx 7 Series FPGAs Data Sheet: Overview]]
 +  * [[https://docs.xilinx.com/v/u/en-US/ug585-Zynq-7000-TRM|Xilinx Zynq-7000 Technical Reference Manual (UG585)]]
 +  * [[https://github.com/Digilent/digilent-xdc|Master XDC Files for Digilent Boards]]
 +  * [[https://github.com/Digilent/vivado-boards|Board Files for Digilent Boards]]
 +  * {{reference:programmable-logic:eclypse-z7:eclypse_z7_sch_b2.pdf|Eclypse Z7 Schematic}}
 +  * {{https://digilent.s3-us-west-2.amazonaws.com/resources/programmable-logic/eclypse/Eclypse-PMCU-Specification-Public.pdf|Eclypse Platform MCU Specification}}
 +  * {{:reference:programmable-logic:eclypse-z7:decutil.1.pdf|Digilent Eclypse Utility (decutil) Manual}}
 +    * //The Digilent Eclypse Utility is a command line tool available within Digilent-provided Linux system images that allows the user to communicate with the Eclypse PMCU.//
 +  * {{ :reference:programmable-logic:eclypse-z7:eclypse_z7_enclosure_assembly_guide.pdf | Eclypse Z7 Enclosure Assembly Guide}}
 +
 +----
 +===== Peripherals =====
 +
 +  * The Eclypse Z7 is compatible with [[zmod:start|Digilent Zmods]], as well as other modules that conform to Opal Kelly's [[https://syzygyfpga.io|SYZYGY Standard Specification]]. A list of Digilent Zmods can be found through their start page, linked above.
 +
 +  * The Eclypse Z7 is compatible with modules that conform to Digilent's Pmod™ Specification, including Digilent's line of [[pmod:start|Pmods]].
 +
 +----
 +===== Development Environments =====
 +**Important:** //The Eclypse Z7's tutorials, projects, and system images target Vivado 2019.1, Xilinx SDK 2019.1, and Petalinux 2019.1, and are not officially supported in other versions of Vivado.//
 +\\ \\
 +== Vivado and Xilinx SDK ==
 +  * [[:vivado:installing-vivado:start]] covers first-time installation of Vivado, Xilinx SDK, and board files to support Vivado IPI flows for Digilent boards.
 +
 +== Petalinux ==
 +  * Petalinux is a tool created by Xilinx, used for the creation and modification of Linux images for Xilinx chips, including the Zynq-7000. \\ Xilinx's [[https://docs.xilinx.com/v/u/2019.1-English/ug1144-petalinux-tools-reference-guide|Petalinux Tools Reference Guide (UG1144)]] covers installation and usage of Petalinux. Chapter 2 discusses the installation process. \\ **Note:** //For Windows users, Digilent recommends the use of either a dual-boot Linux setup or virtual machine that fits the requirements specified in UG1144, linked above.//
 +
 +----
 +===== Example Projects =====
 +
 +  * [[/programmable-logic/eclypse-z7/demos/zmod-scope]] is a software demo (Baremetal and PetaLinux) that captures data from the <nowiki>ADC</nowiki> and writes it out to a file (in PetaLinux) and standard out. This demo uses the Zmod Library and the initial release of the Zmod IPs. Zmod Scope variants other than the 1410-105 are not supported.
 +
 +  * [[/programmable-logic/eclypse-z7/demos/zmod-awg]] is a software demo (Baremetal and PetaLinux) that outputs a ramp waveform through one of the channels of the Zmod AWG. This demo uses the Zmod Library and the initial release of the Zmod IPs.
 +
 +  * [[/programmable-logic/eclypse-z7/demos/low-level-low-pass-filter]] is a hardware-only demo that captures data from a Zmod Scope, passes it through a FIR filter in the Zynq PL, and outputs it through a Zmod AWG. The latest release of the Zmod IPs is used, and all variants of the Zmod Scope are supported.
 +
 +  * The [[/programmable-logic/eclypse-z7/demos/oob]] is programmed into flash memory during manufacturing of the Eclypse. Baremetal software is used to cycle the RGB LEDs and report button states over UART.
 +
 +----
 +===== Support for Zmods =====
 +As of the time of writing, two different versions of the Zmod IPs used to provide a hardware interface from the Zynq PL to the Zmods exist. These two versions have different pros and cons. In short, at the time of writing, the latest release supports all of the variants of the Zmod Scope but does not yet support Petalinux or Baremetal software projects, while the initial release fully supports software, but does not support variants of the Zmod Scope other than the 1410-105.
 +
 +=== Latest Release ===
 +The Zmod AWG 1411 Controller and Zmod Scope 1410 Controller make up the second release of the low-level controller IP. No compatible software libraries are available at the time of writing.
 +
 +For a hardware-only project demonstrating their use, see the [[/programmable-logic/eclypse-z7/demos/low-level-low-pass-filter]].
 +
 +  * [[https://github.com/Digilent/vivado-library/blob/zmod/v2/2019.1-2/ip/Zmods/ZmodScopeController/docs/ZmodScopeController.pdf|Zmod Scope Controller IP Core User Guide]]
 +  * [[https://github.com/Digilent/vivado-library/blob/zmod/v2/2019.1-2/ip/Zmods/ZmodAWGController/docs/ZmodAWG1411_Controller.pdf|Zmod AWG 1411 Controller IP Core User Guide]]
 +
 +----
 +=== Initial Release ===
 +== Zmod AWG == 
 +The initial release of demos for the Eclypse and Zmod AWG used the Zmod Library to control the Zmod AWG through the Zmod DAC 1411 AXI Adapter and Zmod DAC 1411 Low Level Controller IPs.
 +
 +[[/programmable-logic/eclypse-z7/demos/zmod-awg]] is a software demo (Baremetal and PetaLinux) that outputs a ramp waveform through one of the channels of the Zmod AWG. This demo uses the Zmod Library and the initial release of the Zmod IPs.
 +
 +  * [[/zmod/zmodbaselibraryuserguide]].
 +  * [[zmod:awg:zmoddac1411libraryuserguide]]
 +  * [[https://github.com/Digilent/vivado-library/blob/zmod/v1/2019.1-2/ip/Zmods/AXI_Zmod_DAC1411/doc/ZmodDAC1411AxiAdapter.pdf|Zmod DAC 1411 AXI Adapter User Guide]]
 +  * [[https://github.com/Digilent/vivado-library/blob/zmod/v1/2019.1-2/ip/Zmods/ZmodDAC1411_Controller/docs/ZmodDAC1411LLC.pdf|Zmod DAC 1411 Low Level Controller User Guide]]
 +
 +----
 +== Zmod Scope ==
 +The initial release of demos for the Eclypse and Zmod Scope used the Zmod Library to control the Zmod Scope through the Zmod ADC1410 AXI Adapter and Zmod ADC 1410 Low Level Controller IPs. These IPs are **only** compatible with the Zmod Scope 1410-105 (formerly the Zmod ADC 1410).
 +
 +[[/programmable-logic/eclypse-z7/demos/zmod-scope]] is a software demo (Baremetal and PetaLinux) that performs an immediate capture of 10 μs of data from channel one of the Zmod Scope and writes it to standard out and (in Linux) a file. This demo uses the Zmod Library and the initial release of the Zmod IPs.
 +
 +  * [[/zmod/zmodbaselibraryuserguide]].
 +  * [[zmod:scope:zmodadc1410libraryuserguide]]
 +  * [[https://github.com/Digilent/vivado-library/blob/zmod/v1/2019.1-2/ip/Zmods/AXI_Zmod_ADC1410/docs/ZmodADC1410AxiAdapter.pdf|Zmod ADC 1410 AXI Adapter User Guide]]
 +  * [[https://github.com/Digilent/vivado-library/blob/zmod/v1/2019.1-2/ip/Zmods/ZmodADC1410Controller/docs/ZmodADC1410LLC.pdf|Zmod ADC 1410 Low Level Controller User Guide]]
 +
 +----
 +===== Additional Tutorials and Guides for the Eclypse Platform =====
 +
 +  * [[zmod:zmodbaselibraryuserguide]]
 +    * The documentation of the Zmod Base Library includes the steps necessary to run one of several Digilent-provided software examples on the Eclypse Platform.
 +    * **Note:** //The Zmod Library is only compatible with the initial release of the Zmod IPs, as described above.//
 +  * [[:vivado:getting-started-with-ipi:start]]
 +    * This tutorial covers the creation of a basic baremetal application that blinks an <nowiki>LED</nowiki>. Vivado IPI is used to design the system and Xilinx SDK is used to develop the application.
 +  * [[learn:programmable-logic:tutorials:vivado-hierarchical-blocks:start]]
 +    * This tutorial covers the addition of a hierarchical block supporting a specific peripheral, whether Pmod or Zmod, to an existing IPI design, adding required library source files to a baremetal Xilinx SDK application project, and running an example on the board.
 +  * [[/programmable-logic/eclypse-z7/customizing-zmods-os]]
 +    * This tutorial covers the steps necessary to configure and build the Eclypse Z7 Petalinux project to support a new Zmod configuration.
 +
 +----
 +===== Additional Resources =====
 +  * [[https://github.com/Digilent/Eclypse-Z7-OOB|Eclypse Z7 Out-of-Box Demo (GitHub)]]
 +  * {{reference:programmable-logic:eclypse-z7:eclypsez7_pcbas_a5.pdf|Mechanical Diagrams for the Eclypse Z7}}
 +  * [[https://files.digilent.com/resources/whitepapers/Digilent-Designing_A_Filter_On_MATLAB.pdf|Whitepaper - Designing and Verifying a Digital Filter Using MATLAB With Eclypse Z7 as FPGA-in-the-Loop]]
 +
 +  * [[https://vaxelinc.com/downloads/|VAXEL Resources]]
 +    * VAXEL-EZ boosts the productivity of algorithm verification processes on Digilent FPGA boards. The package includes a set of utility software that runs on Windows to facilitate tasks ranging from automation of FPGA synthesis to execution of tests. With VAXEL-EZ, no FPGA expertise is needed to take full advantage of the Digilent FPGA boards.
 +
 +----
 +{{tag>resource-center}}