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| programmable-logic:arty-z7:demos:xadc [2022/08/16 14:39] – [Table] andreisopterean | programmable-logic:arty-z7:demos:xadc [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| + | ====== Arty Z7 XADC Demo ====== | ||
| + | <WRAP round todo> | ||
| + | === Under Construction === | ||
| + | </ | ||
| + | |||
| + | {{: | ||
| + | |||
| + | ---- | ||
| + | ===== Description ===== | ||
| + | |||
| + | This project instantiates the XADC IP Core and measures an analog voltage, this simple XADC demo is a Verilog project made to demonstrate the ADC functionality of the Arty Z7. Only the programmable logic of the Arty Z7 is used. | ||
| + | |||
| + | * The LED associated with a specific channel brightens when the read voltage goes up. | ||
| + | * The two user switches enable two XADC channels to be read from. | ||
| + | |||
| + | This demo uses the chipKIT Analog connector, which has differential ports 1, 2, and 3 connected to the XADC pins 12, 0, and 8, respectively. This can be seen in the schematic below. | ||
| + | |||
| + | {{: | ||
| + | |||
| + | ---- | ||
| + | ===== Inventory ===== | ||
| + | |||
| + | * Arty Z7 with a MicroUSB Programming Cable | ||
| + | * Vivado installation compatible with the latest release of this demo (2020.1) | ||
| + | * //See [[programmable-logic: | ||
| + | * Wires and a Circuit to Test | ||
| + | |||
| + | ---- | ||
| + | ===== Download and Usage Instructions ===== | ||
| + | |||
| + | First and foremost, releases - consisting of a set of files for download - are only compatible with a specific version of the Xilinx tools, as specified in the name of the release (referred to as a //release tag//). In addition, releases are only compatible with the specified variant of the board. For example, a release tagged " | ||
| + | |||
| + | The latest release version for this demo is highlighted in green. | ||
| + | |||
| + | **Note:** //Releases for FPGA demos from before 2020.1 used a different git structure, and used a different release tag naming scheme.// | ||
| + | |||
| + | ^ Board Variant | ||
| + | | Arty Z7-10 | @#C0EEBD: 10/ | ||
| + | | Arty Z7-20 | @#C0EEBD: 20/ | ||
| + | | Arty Z7-10 | v2018.2-1 | ||
| + | | Arty Z7-20 | v2018.2-1 | ||
| + | |||
| + | **Note for Advanced Users:** //All demos for the Arty Z7 are provided through the [[https:// | ||
| + | ---- | ||
| + | Instructions on the use of the latest release can be found in this dropdown: | ||
| + | |||
| + | --> Using the Latest Release # | ||
| + | |||
| + | <WRAP group> | ||
| + | |||
| + | {{page> | ||
| + | |||
| + | --> Set up the Arty Z7 # | ||
| + | |||
| + | Plug the Arty Z7 into the computer using the microUSB cable. The circuit and wires can be attached after the demo is already running. | ||
| + | |||
| + | ---- | ||
| + | <-- | ||
| + | |||
| + | {{page> | ||
| + | |||
| + | At this point, the demo is now running on your board. Refer to the [[# | ||
| + | </ | ||
| + | |||
| + | <-- | ||
| + | |||
| + | ---- | ||
| + | ===== Functionality ===== | ||
| + | ==== 1. LEDs and Switches ==== | ||
| + | |||
| + | The demo reads analog data in from each enabled XADC channel (set the associated switch to the high position to enable that channel) and sets the brightness on the associated led linearly. Higher voltage = brighter led. | ||
| + | |||
| + | ==== 2. Setting up the Circuit ==== | ||
| + | <WRAP group> <WRAP column half> | ||
| + | As seen in the image to the right, this demo was tested using a resistor ladder to show the different brightness values the demo puts out. This demo can be used to measure any voltage between 0 and 1 volt. The brighter the led, the closer to 1 the voltage is. The voltages from the ladder are 0.5V and 0.1V. The circuit uses a chain of ten 1KOhm resistors in series with two parallel 47KOhm resistors tied to the 3V3 and GND pins of the XADC header to create these voltages. | ||
| + | </ | ||
| + | {{: | ||
| + | </ | ||
| + | ---- | ||
| + | ===== Additional Resources ===== | ||
| + | |||
| + | All materials related to the use of the Arty Z7 can be found on its [[..: | ||
| + | |||
| + | For a walkthrough of the process of creating a simple HDL project in Vivado, see [[programmable-logic: | ||
| + | |||
| + | For technical support, please visit the [[https:// | ||
| + | |||
| + | ---- | ||
| + | < | ||

