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| programmable-logic:arty-a7:start [2022/03/28 14:39] – Update xilinx links Arthur Brown | programmable-logic:arty-a7:start [2023/02/28 07:42] (current) – Sam K | ||
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| - | ~~NOTOC~~ | + | ~~NOTOC~~ |
| - | + | ||
| ====== Arty A7 ====== | ====== Arty A7 ====== | ||
| {{Digilent Infobox | {{Digilent Infobox | ||
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| | Bullet = Programmable over JTAG and Quad-SPI Flash | | Bullet = Programmable over JTAG and Quad-SPI Flash | ||
| | Bullet = On-chip analog-to-digital converter | | Bullet = On-chip analog-to-digital converter | ||
| - | | Header = Key Specifications | + | | Header = Key Specifications |
| | FPGA Part # = XC7A35TICSG324-1L (XC7A100TCSG324-1*) | | FPGA Part # = XC7A35TICSG324-1L (XC7A100TCSG324-1*) | ||
| | Logic Slices = 5,200 (15,850*) | | Logic Slices = 5,200 (15,850*) | ||
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| * [[learn/ | * [[learn/ | ||
| * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. | * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. | ||
| - | * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and newer. | + | * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older. |
| * [[programmable-logic/ | * [[programmable-logic/ | ||

