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programmable-logic:arty-a7:start [2021/09/28 16:48] – Arthur Brownprogrammable-logic:arty-a7:start [2023/02/28 07:42] (current) – Sam K
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-~~NOTOC~~  +~~NOTOC~~ 
- +
 ====== Arty A7 ====== ====== Arty A7 ======
 {{Digilent Infobox {{Digilent Infobox
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 | Bullet = Programmable over JTAG and Quad-SPI Flash | Bullet = Programmable over JTAG and Quad-SPI Flash
 | Bullet = On-chip analog-to-digital converter | Bullet = On-chip analog-to-digital converter
-| Header = Key Specifications+| Header = Key Specifications 
 | FPGA Part # = XC7A35TICSG324-1L (XC7A100TCSG324-1*) | FPGA Part # = XC7A35TICSG324-1L (XC7A100TCSG324-1*)
 | Logic Slices =  5,200 (15,850*) | Logic Slices =  5,200 (15,850*)
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 ===== Documentation===== ===== Documentation=====
  
-{{topic>arty-a7 +doc}}+  * [[/programmable-logic/arty-a7/reference-manual]] 
 +  * [[/learn/programmable-logic/doc/github/digilent-xdc]] 
 +  * [[/learn/programmable-logic/doc/datasheets/7-series-fpgas-overview]] 
 +  * [[/learn/programmable-logic/doc/datasheets/artix-7-datasheet]] 
 + 
 +  * {{/programmable-logic/arty-a7/arty-a7-e2-sch.pdf|Arty A7 Revision E.2 Schematic}} 
 +  * {{reference/programmable-logic/arty-a7/arty_a7_sch.pdf|Arty A7 Revision E.0 Schematic}} 
 + 
 +  * {{https://files.digilent.com/resources/programmable-logic/documents/S25FL127S_PCN.pdf|Product Change Notice - Flash Memory}}
  
 ---- ----
 ===== Tutorials ===== ===== Tutorials =====
-{{topic>arty-a7 +tutorial -legacy -in-work}}+ 
 +  * [[programmable-logic:guides:installing-vivado-and-vitis]] 
 +    * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards. 
 +  * [[programmable-logic:guides:getting-started-with-ipi]] 
 +    * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs. 
 +  * [[programmable-logic:guides:getting-started-with-vivado]] 
 +    * Walks through using Vivado to create a simple design that blinks a single LED. 
 +  * [[learn/programmable-logic/tutorials/pmod-ips/start]] 
 +    * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. 
 +    * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older. 
 +  * [[programmable-logic/arty-a7/arty_a7_100_risc_v/start]]
  
 ---- ----
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     * **Note**: //Working with DesignStart FPGA requires a license. A free 90-day trial license can be obtained, as described in the guide.//     * **Note**: //Working with DesignStart FPGA requires a license. A free 90-day trial license can be obtained, as described in the guide.//
   * Digilent Forum user jmw created a Microblaze port of the [[https://github.com/jmwilson/Adafruit-GFX-Library_MicroBlaze|Adafruit GFX]] and [[https://github.com/jmwilson/Adafruit_SSD1306_MicroBlaze|Adafruit SSD1306]] libraries for the Arty, which likely can be made compatible with the Pmod OLED. The original Forum thread is available [[https://forum.digilentinc.com/topic/3407-adafruit-ssd1306-library-on-microblaze/|here]].   * Digilent Forum user jmw created a Microblaze port of the [[https://github.com/jmwilson/Adafruit-GFX-Library_MicroBlaze|Adafruit GFX]] and [[https://github.com/jmwilson/Adafruit_SSD1306_MicroBlaze|Adafruit SSD1306]] libraries for the Arty, which likely can be made compatible with the Pmod OLED. The original Forum thread is available [[https://forum.digilentinc.com/topic/3407-adafruit-ssd1306-library-on-microblaze/|here]].
-  * [[https://forums.xilinx.com/t5/Xcell-Daily-Blog-Archived/Adam-Taylor-s-MicroZed-Chronicles-Part-221-How-to-boot-a/ba-p/802317|How to boot a MicroBlaze soft processor from non-volatile memory ]]+/*  * [[https://forums.xilinx.com/t5/Xcell-Daily-Blog-Archived/Adam-Taylor-s-MicroZed-Chronicles-Part-221-How-to-boot-a/ba-p/802317|How to boot a MicroBlaze soft processor from non-volatile memory ]] */
   * Arty A7 100T project using the Pmod ACL2, Pmod CLS, and Pmod 7SD created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20397-muxssd-driver-for-the-pmod-ssd/|Forum thread]]   * Arty A7 100T project using the Pmod ACL2, Pmod CLS, and Pmod 7SD created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20397-muxssd-driver-for-the-pmod-ssd/|Forum thread]]
   * Arty A7 100T project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20419-spi-memory-tester-ipi-bd-and-vhdl/|Forum thread]]   * Arty A7 100T project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20419-spi-memory-tester-ipi-bd-and-vhdl/|Forum thread]]
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   * [[:learn:programmable-logic:tutorials:htsspisf:|How to Store a Vivado SDK Project in SPI Flash]]   * [[:learn:programmable-logic:tutorials:htsspisf:|How to Store a Vivado SDK Project in SPI Flash]]
   * [[:learn:programmable-logic:tutorials:program_fpgas_through_multisim:|Programming FPGAs through Multisim]]   * [[:learn:programmable-logic:tutorials:program_fpgas_through_multisim:|Programming FPGAs through Multisim]]
-  * [[http://www.xilinx.com/support/university/workshops.html|Xilinx Vivado Workshop materials]]+  * [[https://www.xilinx.com/support/university/workshops.html|Xilinx Vivado Workshop materials]]
   * [[https://www.avnet.com/shop/us/p/kits-and-tools/development-kits/avnet-engineering-services-ade--1/aes-a7mb-7a35t-g-3074457345628965502/|Avnet Arty Materials (Including Out-of-Box demo)]]   * [[https://www.avnet.com/shop/us/p/kits-and-tools/development-kits/avnet-engineering-services-ade--1/aes-a7mb-7a35t-g-3074457345628965502/|Avnet Arty Materials (Including Out-of-Box demo)]]
-  * [[http://www.wiki.xilinx.com/ARTY+FreeRTOS+Web+Server|Xilinx ARTY FreeRTOS Web Server Demo]]+  * [[https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841844/ARTY+FreeRTOS+Web+Server|Xilinx ARTY FreeRTOS Web Server Demo]]
   * [[https://products.avnet.com/opasdata/d120001/medias/docus/10/PB-Artix-7%2035T%20FPGA%20Arty%20Evaluation%20Kit-v4.pdf|Avnet Product Brief]] - //REQUIRES REGISTRATION//   * [[https://products.avnet.com/opasdata/d120001/medias/docus/10/PB-Artix-7%2035T%20FPGA%20Arty%20Evaluation%20Kit-v4.pdf|Avnet Product Brief]] - //REQUIRES REGISTRATION//
   * [[https://www.researchgate.net/profile/Sandro_Pinto2/publication/334151876_The_industry-first_secure_IoT_stack_for_RISC-V_a_research_project/links/5d1a8c9c92851cf4405c8ebf/The-industry-first-secure-IoT-stack-for-RISC-V-a-research-project.pdf|The industry-first secure IoT stack for RISC-V: a research project]]   * [[https://www.researchgate.net/profile/Sandro_Pinto2/publication/334151876_The_industry-first_secure_IoT_stack_for_RISC-V_a_research_project/links/5d1a8c9c92851cf4405c8ebf/The-industry-first-secure-IoT-stack-for-RISC-V-a-research-project.pdf|The industry-first secure IoT stack for RISC-V: a research project]]