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pmod:pmodgyro:start [2021/10/13 20:57] – external edit 127.0.0.1pmod:pmodgyro:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 {{page>reference-manual}} \\ \\ {{page>reference-manual}} \\ \\
    
-===== Tutorials ===== 
-{{topic>pmodgyro +tutorial}} 
-{{topic>pmodip +tutorial}} 
-{{topic>pmod +tutorial}} 
- 
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 ===== Example Projects ===== ===== Example Projects =====
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   * {{:reference:pmod:pmodgyro:pmodgyro_demo_verilog.zip|Nexys 3 Verilog Example - ISE 14.2}}   * {{:reference:pmod:pmodgyro:pmodgyro_demo_verilog.zip|Nexys 3 Verilog Example - ISE 14.2}}
   * {{:reference:pmod:pmodgyro:pmodgyro_demo.zip|Nexys 3 VHDL Example - ISE 14.2}}   * {{:reference:pmod:pmodgyro:pmodgyro_demo.zip|Nexys 3 VHDL Example - ISE 14.2}}
-{{topic>programmable-logic +pmod }}+  * [[learn/programmable-logic/tutorials/pmod-ips/start | Getting Started with Digilent Pmod IPs]] 
 +    * Digilent Pmod IPs are only supported in Vivado and Xilinx SDK versions 2019.1 and earlier. 
  
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