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pmod:pmodclp:start [2022/02/15 13:07] – Keith M Kolmospmod:pmodclp:start [2022/10/04 04:38] (current) – external edit 127.0.0.1
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   * {{:reference:pmod:pmodclp:pmodclp_ise_demo.zip|Nexys 3 VHDL Example - ISE 13.4}}   * {{:reference:pmod:pmodclp:pmodclp_ise_demo.zip|Nexys 3 VHDL Example - ISE 13.4}}
   * {{:reference:pmod:pmodclp:pmodclp_demo.zip|Nexys 3 VHDL Example - ISE 14.2}}   * {{:reference:pmod:pmodclp:pmodclp_demo.zip|Nexys 3 VHDL Example - ISE 14.2}}
-  * Digilent Pmod IPs are only supported in Vivado and Xilinx SDK versions 2019.1 and earlier." 
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 ==Reference Project== ==Reference Project==
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   * Specification Version 1.2.0: {{reference/pmod/pmod-interface-specification-1_2_0.pdf |PDF}}   * Specification Version 1.2.0: {{reference/pmod/pmod-interface-specification-1_2_0.pdf |PDF}}
   * {{reference:pmod:pmodclp:pmodclp_3dmodel.zip|3D Model}}   * {{reference:pmod:pmodclp:pmodclp_3dmodel.zip|3D Model}}
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 {{tag>pmod pmod-start pmod-gpio pmodclp character-lcd resource-center}} {{tag>pmod pmod-start pmod-gpio pmodclp character-lcd resource-center}}