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nexys4-ddr:migration_n4 [2015/03/14 05:49] – created sbobrowicznexys4-ddr:migration_n4 [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 ===== Introduction ===== ===== Introduction =====
  
-This guide describes how to migrate an ISE or EDK project that targeted the Nexys3 board to the Nexys4-DDR.+This guide describes how to migrate an ISE or EDK project that targeted the Nexys4 board to the Nexys4-DDR.
  
 ===== Step 1: Modifying the constraints ===== ===== Step 1: Modifying the constraints =====
  
-You will need to update the pin constraints of your design. Open up your UCF file and the Nexys4-DDR Master UCF file (Available [[nexys4-ddr:start|here]]) and replace the constraints in your file with those found in the Master UCF. For example, say you have LD0 on the Nexys3 constrained as follows:+You will need to update the pin constraints of your design. Open up your UCF file and the Nexys4-DDR Master UCF file (Available [[nexys4-ddr:start|here]]) and replace the constraints in your file with those found in the Master UCF. For example, say you have LD0 on the Nexys4 constrained as follows:
  
 <code> <code>
-NET "myled"         LOC=U16 | IOSTANDARD=LVCMOS33;+NET "myled"         LOC=T8 | IOSTANDARD=LVCMOS33;
 </code> </code>
  
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 </code> </code>
  
-You will need to do this for each top level port in your design. If it is not clear what pin for a particular component on the Nexys3 corresponds to the what pin on the Nexys4-DDR, try looking for your component in the next section to see if that clears things up.+You will need to do this for each top level port in your design. If it is not clear what pin for a particular component on the Nexys4 corresponds to the what pin on the Nexys4-DDR, try looking for your component in the next section to see if that clears things up.
  
 ===== Step 2: Components that require additional changes ===== ===== Step 2: Components that require additional changes =====
  
-Some hardware changes have been made to the Nexys4-DDR design that will affect how you interact with some components. If your Nexys3 design uses any of the components below, you will need to read what changes you will have to make in order for the design to work on the Nexys4-DDR.+Some hardware changes have been made to the Nexys4-DDR design that will affect how you interact with some components. If your Nexys4 design uses any of the components below, you will need to read what changes you will have to make in order for the design to work on the Nexys4-DDR.
  
 ==== CellRAM ==== ==== CellRAM ====
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 ===== Still Stuck? ===== ===== Still Stuck? =====
  
-If you are still having trouble getting your project ported to the Nexys4-DDR, please post your problem on the [[https://forum.digilentinc.com/|Digilent Forum]], and we will do are best to get your design up and running.+If you are still having trouble getting your project ported to the Nexys4-DDR, please post your problem on the [[https://forum.digilent.com/|Digilent Forum]], and we will do our best to get your design up and running.