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nexys4-ddr:advmb [2015/01/28 04:58] – [!UNDER CONSTRUCTION!] sbobrowicznexys4-ddr:advmb [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 {{:vivado:mig_13.jpg|}}  {{:vivado:mig_13.jpg|}} 
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-Select the **Clocking Options** tab. 
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-Under Input Clock Information Section, for the Primary clock, select //Single ended clock capable pin// as the source 
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-{{:vivado:clk_single_step13.jpg|}} 
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 14. Select the **Output Clocks** tab. 14. Select the **Output Clocks** tab.