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nexys:nexys4:gsg [2014/11/06 20:32] – Thomas Kappenmannexys:nexys4:gsg [2022/10/04 11:38] (current) – external edit 127.0.0.1
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   * Nexys4   * Nexys4
   * Micro-USB cable   * Micro-USB cable
- 
 ------ ------
 =====Powering it On===== =====Powering it On=====
 To power on the Nexys4, you will need a micro-USB cable. Plug this cable into the JTAG slot on the Nexys4, plug the other end into your computer, and flip the power switch to the "On" position. This will begin the out of box demo. To power on the Nexys4, you will need a micro-USB cable. Plug this cable into the JTAG slot on the Nexys4, plug the other end into your computer, and flip the power switch to the "On" position. This will begin the out of box demo.
  
-More information on this startup demo can be found [[basys3:gpiodemo#running_the_basys3_gpio_demo|here]]FIXME.+More information on this startup demo can be found [[nexys:nexys4:userdemo#Running_the_Nexys4_User_Demo|here]].
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 =====Getting Started with Vivado===== =====Getting Started with Vivado=====
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 This video will give you step by step instructions to get started with your Nexys4. This video will give you step by step instructions to get started with your Nexys4.
  
-The files needed for this demo can be downloaded by clicking {{:basys3:abacus_verilog_srcfiles_10_1_2014.zip|here}}. You'll also need the constraints file which can be downloaded [[http://digilentinc.com/Data/Products/NEXYS4/Nexys4_Master_xdc.zip|here]]. +The files needed for this demo can be downloaded by clicking {{:nexys:nexys4:abacus_verilog_srcfiles.zip|here}}. You'll also need the constraints file which can be downloaded [[http://digilentinc.com/Data/Products/NEXYS4/Nexys4_Master_xdc.zip|here]].
- +
-{{ http://www.youtube.com/v/6_GxkslqbcU?.swf?560×315 }}+
  
 More information on the Abacus project can be found [[basys3:abacus|here]]. More information on the Abacus project can be found [[basys3:abacus|here]].
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 {{ :basys3:3.png?nolink&500 |}} {{ :basys3:3.png?nolink&500 |}}
  
-This is where we'll import our Xlilinx Design Constraints file (XDC) to map the HDL signals to the Artix-7 pins. Click on "Add Files", navigate to where you saved your Nexys4_Master.xdc file, select it, and click "Next". +This is where we'll import our Xlilinx Design Constraints file (XDC) to map the HDL signals to the Artix-7 pins. Click on "Add Files", navigate to where you saved your [[http://digilentinc.com/Data/Products/NEXYS4/Nexys4_Master_xdc.zip|Nexys4_Master.xdc]] file, select it, and click "Next". 
-{{ :basys3:4.png?nolink&500 |}}+{{ :nexys:nexys4:1.png?nolink&500 |}}
  
-At this point you'll see the part selection screen. +At this point you'll see the part selection screen. To find our board set the following filters
-{{ :basys3:6.png?nolink&500 |}} +
- +
-You'll find all of the information you need on the Artix-7 chip on your board. +
- +
-{{ :basys3:5.png?nolink&500 |}} +
- +
-To find our board set the following filters+
  
 >Family: Artix-7 >Family: Artix-7
 >Sub-Family: Artix-7 >Sub-Family: Artix-7
->Package: cpg236+>Package: csg324
 >Speed grade: -1 >Speed grade: -1
  
-Then choose the top part labeled "xc7a35tcpg236-1" and click "Next" and then "Finish". +Select the part labeled "xc7a100tcsg324-1" and click "Next" followed by finish. 
-{{ :basys3:61.png?nolink&500 |}}+{{ :nexys:nexys4:3.png?nolink&700 |}} 
 + 
 +You'll find all of the information you need on the Artix-7 chip on your board. 
 + 
 +{{ :nexys:nexys4:2.png?nolink&300 |{{ :basys3:5.png?nolink&500 |}}
  
 This will create your project and bring you to the Vivado project home page. This will create your project and bring you to the Vivado project home page.
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 On the home page, you will see the files that you imported earlier in the "Sources" box. On the home page, you will see the files that you imported earlier in the "Sources" box.
  
-{{ :basys3:11.png?nolink&1000 |}}+{{ :nexys:nexys4:frontpage.png?nolink&1000 |}}
  
 Double clicking a file will open it in the window to the right. "Nexys4_Abacus_Top" is the top module for the abacus demo we will be running. Clicking the [+] button will reveal the lower level modules used in it. Double clicking a file will open it in the window to the right. "Nexys4_Abacus_Top" is the top module for the abacus demo we will be running. Clicking the [+] button will reveal the lower level modules used in it.
-{{ :basys3:12.png?nolink&500 |}}+{{ :nexys:nexys4:modules2.png?nolink&500 |}}
  
 Before we run our program, we must first map the signals to pins using the Nexys4_Master.xdc file we imported. To do this, we will open Nexys4_Master.xdc. Inside this file, we will see how Vivado maps signals to pins. Each line should be commented out at this point (with #), so it should look something like this. Before we run our program, we must first map the signals to pins using the Nexys4_Master.xdc file we imported. To do this, we will open Nexys4_Master.xdc. Inside this file, we will see how Vivado maps signals to pins. Each line should be commented out at this point (with #), so it should look something like this.
  
-{{ :basys3:13.png?nolink&500 |}}+{{ :nexys:nexys4:xdcfilecommented.png?nolink&500 |}}
  
 First, we want to make sure our signal names match the ones in the .xdc file. This can be confirmed by comparing the signal name in the .xdc file with the signal name in the top module. //These are case sensitive!// First, we want to make sure our signal names match the ones in the .xdc file. This can be confirmed by comparing the signal name in the .xdc file with the signal name in the top module. //These are case sensitive!//
  
  
-  - .xdc file{{ :basys3:14.png?nolink&500 |xdc file}} +.xdc file 
-  - Top module file{{ :basys3:15.png?nolink&500 |Top module }}+ 
 +{{:nexys:nexys4:xdc.png?nolink&500|}} 
 + 
 +Top module file 
 + 
 +{{:nexys:nexys4:nexys4top.png?nolink&300|}}
  
 Once these are confirmed, we will uncomment whichever constraints we are using in the .xdc file. Once these are confirmed, we will uncomment whichever constraints we are using in the .xdc file.
-These constraints can be uncommented by selecting the lines of the signals we are using and un-toggling the comments (Ctrl+/). In this case, we can just select every line in the xdc file (Ctrl+A) and then uncomment them (Ctrl+/). This will result in some warnings later, but will not affect the output.+These constraints can be uncommented by selecting the lines of the signals we are using and un-toggling the comments (Ctrl+/). In this case, we are using clk, btnC, btnU, btnD, btnR, btnL, sw[0] through sw[15], led[0] through led[15], seg[0] through seg[6], an[0] through an[7], and dp. Go through the xdc file and uncomment the lines corresponding to these signals.
  
-{{ :basys3:16.png?nolink&500 |}}+{{ :nexys:nexys4:xdcuncommented.png?nolink&500 |}}
  
 After uncommenting the xdc file, save it and we can start programming your Nexys4. After uncommenting the xdc file, save it and we can start programming your Nexys4.
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 There are two ways to program your Nexys4 FPGA: using a .bit file and using a .bin file. Using a .bit file, we  use the JTAG programming cable to load the bit file into the FPGA. Programming with a .bin file will use the QSPI to program the FPGA each time it is powered on. This means you will not have to reprogram it using the JTAG connector each time. We will specify that we want to generate a .bin file by clicking Tools>Project Settings>Bitstream. In this window we will check the box next to .bin_file. There are two ways to program your Nexys4 FPGA: using a .bit file and using a .bin file. Using a .bit file, we  use the JTAG programming cable to load the bit file into the FPGA. Programming with a .bin file will use the QSPI to program the FPGA each time it is powered on. This means you will not have to reprogram it using the JTAG connector each time. We will specify that we want to generate a .bin file by clicking Tools>Project Settings>Bitstream. In this window we will check the box next to .bin_file.
 {{ :basys3:27.png?nolink&500 |}} {{ :basys3:27.png?nolink&500 |}}
-===Programming the Nexys4 with a .bit file===+
 To begin, we will run the synthesis by clicking "Run Synthesis" beneath Synthesis in the Flow Navigator on the left side of Vivado. To begin, we will run the synthesis by clicking "Run Synthesis" beneath Synthesis in the Flow Navigator on the left side of Vivado.
 {{ :basys3:17.png?nolink&200 |}} {{ :basys3:17.png?nolink&200 |}}
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 {{ :basys3:19.png?nolink&1000 |}} {{ :basys3:19.png?nolink&1000 |}}
  
-To improve programming speed, in the main toolbar select Tools>Edit Device Properties...+===Setting device properties (Recommended)=== 
 +To improve programming speed and avoid programming errors, in the main toolbar select Tools>Edit Device Properties...
  
 Under General, set Enable Bitsream Compression to "TRUE". Under General, set Enable Bitsream Compression to "TRUE".
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 {{ :basys3:26.png?nolink&300 |}} {{ :basys3:26.png?nolink&300 |}}
 At this point, make sure your Nexys4 is plugged in via USB and turned on. Now click Next twice and you will see this screen. At this point, make sure your Nexys4 is plugged in via USB and turned on. Now click Next twice and you will see this screen.
-{{ :basys3:28.png?nolink&500 |}}+{{ :nexys:nexys4:target.png?nolink&500 |}}
 Set the JTAG Clock Frequency to 30000000, select the device, and click "Next" followed by "Finish". Set the JTAG Clock Frequency to 30000000, select the device, and click "Next" followed by "Finish".
  
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 First, make sure that the jumper JP1 is in the JTAG position. First, make sure that the jumper JP1 is in the JTAG position.
 You should see something like this. You should see something like this.
-{{ :basys3:29.png?nolink&700 |}}+{{ :nexys:nexys4:hardwaremanager.png?nolink&600 |}}
 Click "Program device" (in the green bar) then xc7a35t_0, select your .bit file in the bitstream file box, and click Program. Click "Program device" (in the green bar) then xc7a35t_0, select your .bit file in the bitstream file box, and click Program.
-{{ :basys3:30.png?nolink&700 |}}+{{ :nexys:nexys4:programdevice.png?nolink&500 |}}
 This will program your Nexys4 through the JTAG connector. This will program your Nexys4 through the JTAG connector.
  
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 In the Hardware Manager window, under hardware right click your device and click Add Configuration Memory Device... In the Hardware Manager window, under hardware right click your device and click Add Configuration Memory Device...
 {{ :basys3:31.png?nolink&500 |}} {{ :basys3:31.png?nolink&500 |}}
-This window will pop up. Search for "Spansion" and select the 32 bit device (highlighted below). Click OK on the next window asking if you want to program the configuration memory device. +This window will pop up. Search for "Spansion" and select s25fl128sxxxxxx0-spi-x1_x2_x4 (highlighted below). Click OK on the next window asking if you want to program the configuration memory device. 
-{{ :basys3:32.png?nolink&500 |}}+{{ :nexys:nexys4:configuration_memory_device.png?nolink&500 |}}
  
 Select the .bin file where it asks for a configuration file and finally click OK. Select the .bin file where it asks for a configuration file and finally click OK.
-{{ :basys3:34.png?nolink&500 |}}+{{ :nexys:nexys4:program_config.png?nolink&500 |}}
  
 Vivado will now erase the old configuration file, and reprogram your Nexys4 with the Abacus demo file. From now on, when you power cycle the Nexys4, the abacus demo will load at startup. Vivado will now erase the old configuration file, and reprogram your Nexys4 with the Abacus demo file. From now on, when you power cycle the Nexys4, the abacus demo will load at startup.