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Zedboard LED Demo

Overview

This guide will provide a step by step walk-through of importing a custom IP into Vivado and getting started in Xilinx SDK.

At the end of this tutorial you will have:

Imported and implemented a custom DigiLEDs IP block into the design.

Created .C Project in Xilinx Vivado SDK ( Software Development Kit) to interface with the Zedboard.

Prerequisites

Skills

Familiarity with Vivado
Block Design Experience

Hardware

Digilent Zedboard Board
Micro USB Cable
- Used for UART communication and JTAG programming
Programmable RGB LEDs (WS2812, Neopixels)
- Data-in Signal wire connected to Zedboard's JB1

Software

Xilinx Vivado 2016.2 with the SDK package.
- Follow this Wiki guide (Installing Vivado ) on how to install and activate Vivado

Board Support Files

Zedboard Support Files
- These files will describe GPIO interfaces on your board and make it easier to select your FPGA board and add GPIO IP blocks.
- Follow this Wiki guide (Vivado Board Files for Digilent 7-Series FPGA Boards ) on how to install Board Support Files for Vivado.

Project Files

DigiLED Custom IP : ZIP
main.c file : ZIP

Introduction

In this tutorial, we are going to add our own custom IP block into the base system design to be used with some programmable RGB LEDs.

General Design Flow

I. Vivado

Open Vivado
Create a new block design
Add the Zynq core IP and automate it
Add the DigiLEDs custom IP to the project's IP repository
Add the DigiLEDs IP to the design and configure it.
Validate and save block design
Create HDL system wrapper
Run design Synthesis and Implementation
Generate Bit File
Export Hardware Design including the generated bit stream file to SDK tool
Launch SDK

Now the Hardware design is exported to the SDK tool. The Vivado to SDK hand-off is done internally through Vivado. We will use SDK to create a Software application that will use the customized board interface data and FPGA hardware configuration by importing the hardware design information from Vivado.

II. SDK

Create new application project and select Empty Application template
Import main.c
Program FPGA

Tutorial

When you first run Vivado this will be the main start window where you can create a new project or open a recent one.

1.1) Click on Create New Project.

1.2) You will be presented with the project creation wizard. Click Next.

1.3) Enter a project name and location the click Next.

1.4) Select RTL Project and click Next.

1.5) This demo does not use any existing sources, existing IP or constraints. Click through the next three screens.