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learn:programmable-logic:tutorials:zedboard-getting-started-with-zynq:start [2016/07/14 17:54] – [Getting Started with Zynq] Sam Lowelearn:programmable-logic:tutorials:zedboard-getting-started-with-zynq:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 ====== Getting Started with Zynq ====== ====== Getting Started with Zynq ======
-picture FIXME+ 
 +{{:reference:programmable-logic:zedboard-getting-started-with-zynq:zedboard-obl-bg-600.jpg?600|}}
  
 ===== Overview ===== ===== Overview =====
-This guide will provide a step by step walk-through of creating a hardware design using the Vivado IP Integrator for the Zybo board.+This guide will provide a step by step walk-through of creating a hardware design using the Vivado IP Integrator for the Zedboard.
  
 At the end of this tutorial you will have: At the end of this tutorial you will have:
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 ----- -----
- 
 ===== Prerequisites ===== ===== Prerequisites =====
  
 === Hardware === === Hardware ===
-  * **Digilent's Zybo Development Board and a Micro USB cable for UART communication and JTAG programming**+  * **Digilent's Zedboard Development Board and a Micro USB cable for UART communication and JTAG programming**
  
 === Software === === Software ===
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 === Board Support Files === === Board Support Files ===
-  * **Zybo Support Files** +  * **Zedboard Support Files** 
     * //These files will describe GPIO interfaces on your board and make it easier to select your board in the initial design setup and add GPIO IP blocks in the block design//     * //These files will describe GPIO interfaces on your board and make it easier to select your board in the initial design setup and add GPIO IP blocks in the block design//
     * //Follow this Wiki guide **[[vivado:boardfiles|Vivado Board Files for Digilent 7-Series FPGA Boards]]** on how to install Board Support Files for Vivado 2015.X//     * //Follow this Wiki guide **[[vivado:boardfiles|Vivado Board Files for Digilent 7-Series FPGA Boards]]** on how to install Board Support Files for Vivado 2015.X//
  
 ----- -----
- 
-===== Tutorial ===== 
  
 ==== General Design Flow ==== ==== General Design Flow ====
 I. Vivado  I. Vivado 
-  * Open Vivado and select Zybo board+  * Open Vivado and select Zedboard
   * Create an new Vivado Project   * Create an new Vivado Project
   * Create empty block design workspace inside the new project   * Create empty block design workspace inside the new project
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   * Create new application project and select default Hello World template   * Create new application project and select default Hello World template
   * Program FPGA and run application   * Program FPGA and run application
 +-----
 ==== 1. Creating a New Project ==== ==== 1. Creating a New Project ====
  
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 >1.1) Click on **Create New Project**. >1.1) Click on **Create New Project**.
 > >
->{{:zybo:new_project.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_1.jpg?600|}} 
 +>
 >1.2) You will be presented with the project creation wizard. Click **Next**. >1.2) You will be presented with the project creation wizard. Click **Next**.
 > >
->{{:zybo:create_new.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_2.jpg?600|}} 
 +>
 >1.3) Enter a project name and location the click **Next**. >1.3) Enter a project name and location the click **Next**.
 > >
->{{:zybo:save_location.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_3.jpg?600|}} 
 +>
 >1.4) Select **RTL Project** and click **Next**. >1.4) Select **RTL Project** and click **Next**.
 > >
->{{:zybo:rtl_project.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_4.jpg?600|}} 
 +>
 >1.5) This demo does not use any existing sources, existing IP or constraints. Click through the next three screens. >1.5) This demo does not use any existing sources, existing IP or constraints. Click through the next three screens.
 > >
->{{:zybo:add_sources.png?nolink&500|}}+>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_5.jpg?600|}}
  
->1.6) Select **Boards** and select the **Zybo** board file. Click **Next** and then **Finish**.+>1.6) Select **Boards** and select the **Zedboard** board file. Click **Next** and then **Finish**.
 >  > 
->{{:zybo:default_part.png?nolink&500|}}+>{{:learn:programmable-logic:tutorials:zedboard-getting-started-with-zynq:board_file_zedboard.jpg?600|}}
  
 +<WRAP center round tip 60%> 
 +Make sure to select the board file made by Digilent.
 +</WRAP>
 ----- -----
- 
 ==== 2. Creating a New Block Design ==== ==== 2. Creating a New Block Design ====
  
 >2.1) Once the process has completed, click **Create Block Design** in the flow navigator. >2.1) Once the process has completed, click **Create Block Design** in the flow navigator.
 > >
->{{:zybo:make_block_design.png?nolink&300|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_7.jpg?300|}} 
 +>
 >2.2) Click **OK**. >2.2) Click **OK**.
 > >
->{{:zybo:make_block_design1.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_8.jpg?500|}} 
 +>
 >2.3) A blank Block Design will open up. >2.3) A blank Block Design will open up.
 > >
->{{:zybo:blank_block_design.png?nolink&500|}}+>{{:zybo:blank_block_design.png?700|}}
  
 ----- -----
- 
 ==== 3. Add the Zynq IP & GPIO Blocks ==== ==== 3. Add the Zynq IP & GPIO Blocks ====
  
 >3.1) Click the {{:genesys2:addip.jpg?nolink|}} **Add IP** button and search for ZYNQ. Double click on **ZYNQ7 Processing System** to place the bare Zynq block. >3.1) Click the {{:genesys2:addip.jpg?nolink|}} **Add IP** button and search for ZYNQ. Double click on **ZYNQ7 Processing System** to place the bare Zynq block.
 > >
->{{:zybo:zynq_block.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_9.jpg?600|}} 
 +>
 >3.2) Click the **Run Block Automation** link >3.2) Click the **Run Block Automation** link
 > >
->{{:zybo:block_auto_window.png?nolink&500|}}+>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_10.jpg?600|}}
 > >
 > Your Zynq block should now look like the picture below. > Your Zynq block should now look like the picture below.
->{{ :zybo:after_block_automation.png?nolink&500|}} +> 
 +>
 >3.3) Click the {{:genesys2:addip.jpg?nolink|}} **Add IP** icon again, this time search for "gpio" and add the **AXI GPIO** core. >3.3) Click the {{:genesys2:addip.jpg?nolink|}} **Add IP** icon again, this time search for "gpio" and add the **AXI GPIO** core.
 > >
->{{:zybo:add_gpio_core1.png?nolink&500|}}+>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_11.jpg?nolink&500|}} 
 +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_12.jpg?600|}}
  
 >3.4) Double-click on new **axi_gpio_0** core that was just added to bring up the customizing window. Under the **IP Configuration** tab check the **Enable Dual Channel** box. Click **OK**. >3.4) Double-click on new **axi_gpio_0** core that was just added to bring up the customizing window. Under the **IP Configuration** tab check the **Enable Dual Channel** box. Click **OK**.
 > >
->{{:zybo:setting_dual_channel.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_13.jpg?600|}} 
 +>
 >3.5) Add another GPIO core by repeating step 3.4 but do not enable dual channel. >3.5) Add another GPIO core by repeating step 3.4 but do not enable dual channel.
 > >
->{{:zybo:adding_gpio_core2.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_14.jpg?600|}} 
 +>
 ----- -----
- 
 ==== 4. Run the Connection Automation Tool ==== ==== 4. Run the Connection Automation Tool ====
  
 >4.1) The connection automation tool will add the required logic blocks for the demo. Select **Run Connection Automation** highlighted in blue. >4.1) The connection automation tool will add the required logic blocks for the demo. Select **Run Connection Automation** highlighted in blue.
 > >
->{{:zybo:connection_auto.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_15.jpg?600|}}
- +
->4.2) Check the box by **All Automation**. Select **GPIO** under **axi_gpio_0** and select **btns_4bits** in the Board Part Interface drop-down box.+
 > >
->{{:zybo:conn_auto1.png?nolink&500|}} +>4.2) Check the box by **All Automation**. Select **GPIO** under **axi_gpio_0** and select **btns_5bits** in the Board Part Interface drop-down box.
- +
->4.3) Select **GPIO2** under **axi_gpio_0** and select **swts_4bits** in the drop-down box.+
 > >
->{{:zybo:conn_auto2.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_16.jpg?600|}} 
- +> 
->4.4) Select **GPIO** under **axi_gpio_1** and select **leds_4bits** in the drop-down box and hit **OK**.  +>4.3) Select **GPIO2** under **axi_gpio_0** and select **swts_8bits** in the drop-down box. 
 +> 
 +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_17.jpg?600|}} 
 +> 
 +>4.4) Select **GPIO** under **axi_gpio_1** and select **leds_8bits** in the drop-down box and hit **OK**.   
 +> 
 +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_18.jpg?600|}}
 > >
->{{:zybo:conn_auto3.png?nolink&500|}} 
  
 >4.5) This process will add: >4.5) This process will add:
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     * Processor System Reset      * Processor System Reset 
     * The board parts for the buttons, switches and LEDs.     * The board parts for the buttons, switches and LEDs.
-{{:zybo:sec_block_auto.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_19.1.jpg?600|}} 
 +>
 >4.6) Next let's clean up our Block Design. Click the {{:genesys2:regenerate.jpg?nolink|}} **Regenerate Layout** button to rearrange your block design. >4.6) Next let's clean up our Block Design. Click the {{:genesys2:regenerate.jpg?nolink|}} **Regenerate Layout** button to rearrange your block design.
 > >
->{{:zybo:regen_layout.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_19.jpg?600|}} 
 +>
 ----- -----
- 
 ==== 5. Generate HDL Wrapper and Validate Design ==== ==== 5. Generate HDL Wrapper and Validate Design ====
  
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 >5.2) After the design validation step we will proceed with creating a HDL System Wrapper. In the block design window, under the **Design Sources** tab, right-click on the block diagram file. We labeled it "design_1.bd" and select **Create HDL Wrapper**. >5.2) After the design validation step we will proceed with creating a HDL System Wrapper. In the block design window, under the **Design Sources** tab, right-click on the block diagram file. We labeled it "design_1.bd" and select **Create HDL Wrapper**.
 > >
->{{:zybo:generate_hdl_wrapper.png?nolink&400|}}+>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_20.jpg?600|}}
  
 This will create a top module in VHDL and will allow you to generate a bitstream. This will create a top module in VHDL and will allow you to generate a bitstream.
  
 ----- -----
- 
 ==== 6. Generate the Bitstream ==== ==== 6. Generate the Bitstream ====
  
 >6.1) Click on **Generate Bitstream** at the bottom of the Flow Navigator. Wait for the process to complete and click OK. >6.1) Click on **Generate Bitstream** at the bottom of the Flow Navigator. Wait for the process to complete and click OK.
 > >
->{{:zybo:generate_bitstream.png?nolink&400|}}+>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_22.jpg?300|}}
  
 ----- -----
- 
 ==== 7. Export hardware files for SDK ==== ==== 7. Export hardware files for SDK ====
  
 >7.1) Go to file->Export->Export Hardware... Make sure to check the box for **Include bitstream** then click **OK**. >7.1) Go to file->Export->Export Hardware... Make sure to check the box for **Include bitstream** then click **OK**.
 > >
->{{:zybo:export_hdwr.png?nolink&400|}}+>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_23.jpg?300|}}
  
 ----- -----
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 >8.1) Go to **File->Launch SDK** and click **OK**. >8.1) Go to **File->Launch SDK** and click **OK**.
 > >
->{{:zybo:launch_sdk.png?nolink&400|}}+>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_24.jpg?300|}}
  
 ----- -----
- 
 ==== 9. Create a new Hello World Application Project ==== ==== 9. Create a new Hello World Application Project ====
  
 >9.1) Go to **File->New->Application Project**. >9.1) Go to **File->New->Application Project**.
 > >
->{{:zybo:sdk_new_app_project.png?nolink&500|}} +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_25.jpg?600|}} 
 +>
 >9.2) Enter the project details: >9.2) Enter the project details:
-    * Project name: "getting_started_with_ZYBO" +    * Project name: "zedboard_getting_started_with_zynq" 
-    * Hardware Platform: design_1_weapper_he_platform_0+    * Hardware Platform: design_1_wrapper_hw_platform_0
     * Processor: ps7_cortexas9_0     * Processor: ps7_cortexas9_0
     * Languate: C     * Languate: C
     * OS Platform: standalone     * OS Platform: standalone
     * Board Support Package: Create New (leave default name)     * Board Support Package: Create New (leave default name)
-{{:zybo:sdk_project_details.png?nolink&500|}}+{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_26.jpg?600|}}
  
  
 >9.3) The Hello World demo is a good starting point for this demo. Click **Next**, select **Hello World** and click **Finish**. This process will add two directories to the project explorer.   >9.3) The Hello World demo is a good starting point for this demo. Click **Next**, select **Hello World** and click **Finish**. This process will add two directories to the project explorer.  
  
->9.4) Expand **getting_started_with_ZYBO** then open **src** and double click on "helloworld.c". This is the default Hello World C code.+>9.4) Expand **zedboard_getting_started_with_zynq** then open **src** and double click on "helloworld.c". This is the default Hello World C code. 
 +> 
 +>{{:reference:programmable-logic:zedboard-getting-started-with-zynq:image_27.jpg?300|}}
 > >
->{{:zybo:open_hello_world_c.png?nolink&400|}} 
  
 ----- -----
- 
-==== 10. Creating Our Own Hello World ==== 
- 
 >10.1) Copy and paste the code below into the helloworld.c file. >10.1) Copy and paste the code below into the helloworld.c file.
 <code C> <code C>
 /***************************************************** /*****************************************************
-Getting Started Guide for Zybo+Getting Started Guide for Zedboard
  
 This demo displays the status of the switches on the This demo displays the status of the switches on the
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    -Stop bits: 1    -Stop bits: 1
  
-1/6/14: Created by MarshallW+7/25/16: Created by JonP
 ****************************************************/ ****************************************************/
  
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    while(1){    while(1){
       switch_data = XGpio_DiscreteRead(&input, 2); //get switch data       switch_data = XGpio_DiscreteRead(&input, 2); //get switch data
-      +
       XGpio_DiscreteWrite(&output, 1, switch_data); //write switch data to the LEDs       XGpio_DiscreteWrite(&output, 1, switch_data); //write switch data to the LEDs
  
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       //print message dependent on whether one or more buttons are pressed       //print message dependent on whether one or more buttons are pressed
-      if(button_data == 0b0000){} //do nothing +      if(button_data == 0b00000){} //do nothing 
-       + 
-      else if(button_data == 0b0001)+      else if(button_data == 0b00001)
          xil_printf("button 0 pressed\n\r");          xil_printf("button 0 pressed\n\r");
  
-      else if(button_data == 0b0010)+      else if(button_data == 0b00010)
          xil_printf("button 1 pressed\n\r");          xil_printf("button 1 pressed\n\r");
-  + 
-      else if(button_data == 0b0100)+      else if(button_data == 0b00100)
          xil_printf("button 2 pressed\n\r");          xil_printf("button 2 pressed\n\r");
-  + 
-      else if(button_data == 0b1000)+      else if(button_data == 0b01000)
          xil_printf("button 3 pressed\n\r");          xil_printf("button 3 pressed\n\r");
-      + 
 +      else if(button_data == 0b10000) 
 +              xil_printf("button 4 pressed\n\r"); 
       else       else
          xil_printf("multiple buttons pressed\n\r");          xil_printf("multiple buttons pressed\n\r");
  
       usleep(200000); //delay       usleep(200000); //delay
- +
    }    }
    cleanup_platform();    cleanup_platform();
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 } }
 </code> </code>
 +
  
 ==== 11. Run the Project ==== ==== 11. Run the Project ====
->11.1) Make sure that the Zybo is connected to the host PC via the **UART** USB Port and that JP5 is set to JTAG. To program the FPGA, on the top toolbar, click the {{:genesys2:programfpga.jpg?nolink|}} **Program FPGA** button.+>11.1) Make sure that the Zedboard is connected to the host PC via the **UART** USB Port and that JP5 is set to JTAG. To program the FPGA, on the top toolbar, click the {{:genesys2:programfpga.jpg?nolink|}} **Program FPGA** button. 
 + 
 +>{{:learn:programmable-logic:tutorials:zybo-getting-started-with-zynq-server:echo_server_zynq_9.jpg?direct&600|}}
  
 >11.2) Save the project.  The project will automatically build. >11.2) Save the project.  The project will automatically build.
  
->11.3) Expand the **getting_started_with_ZYBO** directory and the **Binaries** directory. Right click **getting_started_with_ZYBO.elf**, and select **Run As->Launch on Hardware(GDB)**.+>11.3) Right click the **zedboard_getting_started_with_zynq** directory and select run as -> Launch on Hardware(System Debugger).
  
->11.4) The demo will be running on the ZYBO. Try playing around with the 4 switches. Doing so should light its respective LED. Also over the serial port, each button press will produce the message "button x pressed"+>{{:learn:programmable-logic:tutorials:zybo-getting-started-with-zynq-server:echo_server_zynq_13.jpg?direct&600|}} 
 + 
 +>11.4) The demo will be running on the Zedboard. Try playing around with the 4 switches (labeled SW0-SW3). Doing so should light its respective LED. Also over the serial port, pressing each button (labeled BTN0-BTN3) will produce the message "button x pressed". 
 + 
 +>11.5) Tera Term or any serial terminal will work as a Console for displaying the output of the BTN's. 
 + 
 +> Set up the terminal as: 
 + 
 +>{{:learn:programmable-logic:tutorials:zybo-getting-started-with-zynq-server:echo_server_zynq_10.jpg?direct&600|}}
  
 ----- -----
  
 +
 +{{tag>learn programmable-logic tutorial zedboard}}