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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| learn:programmable-logic:tutorials:program_fpgas_through_multisim:start [2021/10/13 21:06] – external edit 127.0.0.1 | learn:programmable-logic:tutorials:program_fpgas_through_multisim:start [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| Line 10: | Line 10: | ||
| You will need one of Digilent' | You will need one of Digilent' | ||
| *[[https:// | *[[https:// | ||
| - | *[[http://store.digilentinc.com/ | + | *[[https://digilent.com/shop/arty-a7-artix-7-fpga-development-board/ |
| - | *[[http://store.digilentinc.com/ | + | *[[https://digilent.com/shop/ |
| - | *[[http://store.digilentinc.com/ | + | *[[https://digilent.com/shop/ |
| - | *[[http://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/ | + | *[[https://digilent.com/shop/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/ |
| Note that in order to fully utilize the capabilities of the Basys 3 and Nexys 4 DDR, there are some configuration file changes that need to be made. Please see [[# | Note that in order to fully utilize the capabilities of the Basys 3 and Nexys 4 DDR, there are some configuration file changes that need to be made. Please see [[# | ||
| Line 19: | Line 19: | ||
| ====Software==== | ====Software==== | ||
| * [[https:// | * [[https:// | ||
| - | * [[http://store.digilentinc.com/ | + | * [[https://digilent.com/shop/ |
| - | * [[https:// | + | * Xilinx Vivado |
| * [[https:// | * [[https:// | ||
| | | ||

