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learn:programmable-logic:tutorials:nexys-4-getting-started-with-microblaze:start [2016/11/15 01:18] – [11. Launching SDK] jon peyronlearn:programmable-logic:tutorials:nexys-4-getting-started-with-microblaze:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 ====== Nexys 4 - Getting Started with Microblaze ====== ====== Nexys 4 - Getting Started with Microblaze ======
 +
 +<WRAP round important 660px>
 +=== Important! ===
 +This guide is obsolete, the updated guide can be found [[:vivado:getting-started-with-ipi:start|here]].
 +</WRAP>
 +
 {{ :nexys:nexys4:overview1.png?300 |}} {{ :nexys:nexys4:overview1.png?300 |}}
  
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 >{{:vivado:mig_18.jpg?500|}} >{{:vivado:mig_18.jpg?500|}}
  
->5.3) This will add a UART block to the existing design. We need a UART controller to communicate between the terminal window on the Host-PC and the Nexys 4 DDR hardware.+>5.3) This will add a UART block to the existing design. We need a UART controller to communicate between the terminal window on the Host-PC and the Nexys 4 hardware.
 > >
 >{{:nexys4-ddr:nexys4ddr-adduart.png?direct&500|}} >{{:nexys4-ddr:nexys4ddr-adduart.png?direct&500|}}
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 > >
 >{{:vivado:mig_50.jpg?500|}} >{{:vivado:mig_50.jpg?500|}}
 +
 +-----
 +==== 14. Programming FPGA with Bit File ====
 +
 +>14.1) Make sure that the Nexys 4 DDR is turned on and connected to the host PC with the provided micro USB cable. 
 +>In the quick selection tool bar, you will find a symbol with a red arrow and three green square boxes. This clickable button is physically located under the //Search// tab in the main tool bar.  
 +>Click on this symbol to open the Program FPGA window. 
 +>Make sure that the //Hardware Platform// is selected as **design_1_wrapper_hw_platform_0**. 
 +>In the software configuration box, under //ELF File to Initialize in Block RAM// column, the row option must read **bootloop**. If not, click on the row and select **bootloop**.
 +>Now click on Program. 
 +>
 +>{{:vivado:mig_53.jpg?500|}}
 +
 +-----
 +==== 15. Run Configuration  ====
 +
 +>15.1) After the FPGA has been successfully programmed with the bit file, from the //Project Explorer// panel, right click on the **display_hello_world** project folder which has been highlighted in the screen capture below. 
 +>At the bottom of the drop down list, select **Run As** and then select **launch on hardware**. 
 +
 +>{{:learn:programmable-logic:tutorials:nexys-4-getting-started-with-microblaze:image15.jpg?500|}}
 +}}
 +-----
 +==== 16. Using Terminal Emulator ====
 +
 +You can use any serial terminal you would like including the one on SDK. We use Tera Term.
 +Refer to this link [[http://en.wikipedia.org/wiki/Tera_Term]] to know what Tera Term is.
 +You can download and install Tera Term from this link [[http://ttssh2.sourceforge.jp/index.html.en]] 
 +
 +
 +>16.1) Establish a serial connection with the correct communication port inside Tera Term. 
 +>Go to //SDK Run Configurations// -> Apply and Run. 
 +>Tera Term will work as a Console by displaying the output. 
 +>Notice that inside the built-in console window of SDK, there is a message displayed that reads // Port COM4 is already in use// indicating that the //COM4// port is in use by Tera Term. 
 +>
 +>{{:vivado:mig_61.jpg?500|}}
  
 ----- -----
  
 +/*{{tag>learn programmable-logic tutorial nexys-4 microblaze}}*/