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learn:programmable-logic:tutorials:cmod-a7-user-demo:start [2017/03/28 16:38] – [Prerequisites] Andrew Holzerlearn:programmable-logic:tutorials:cmod-a7-user-demo:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 ===== Overview ===== ===== Overview =====
 +
 +==== Description ====
 +
 +This simple User Demo project is a Microblaze project that tests the SRAM on the Cmod A7 and features the basic I/O on the device.
 + 
 +  * The SRAM is tested and the results can be seen through the UART port.
 +  * The RGB LED cycles through different colors while BTN1 is pressed.
 +  * The User LEDs display a 2 bit binary counter while BTN1 is pressed.
 +
 +-------
 +
 ==== Features Used ==== ==== Features Used ====
- 
  
 |              ^ Not Used             ^ Used        ^ |              ^ Not Used             ^ Used        ^
 ^ 2 user LEDs                        |     |  X  | ^ 2 user LEDs                        |     |  X  |
-^ 1 tri-color LEDs                   |     |  X  |+^ 1 tri-color LED                    |     |  X  |
 ^ 2 User Push Buttons                |     |  X  | ^ 2 User Push Buttons                |     |  X  |
 ^ 48 GPIO Pins                       |  X  |     | ^ 48 GPIO Pins                       |  X  |     |
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 ^ USB-UART Bridge                    |     |  X  | ^ USB-UART Bridge                    |     |  X  |
 ^ 512 kB SRAM                        |     |  X  | ^ 512 kB SRAM                        |     |  X  |
- 
- 
-===== Description ===== 
- 
-This simple User Demo project is a Microblaze project that tests the SRAM on the Cmod A7 and features the basic I/O on the device. 
-  
-  * The SRAM is tested and the results can be seen through the UART port 
-  * BTN1 when pressed cycles through different colors of the RGB LED 
-  * BTN1 when pressed creates a binary counter with the user LEDs counting up to 3 
- 
- 
-------- 
  
 ===== Prerequisites ===== ===== Prerequisites =====
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 ===Software=== ===Software===
   * **Vivado Design Suite 2016.4**    * **Vivado Design Suite 2016.4** 
-    * //Newer versions can be used, but the procedure may vary slightly//+    * //Newer or older versions can be used, but the procedure may vary//
     * Xilinx SDK 2016.4 must be included in the installation     * Xilinx SDK 2016.4 must be included in the installation
   * **Digilent Board Support Files for Vivado**    * **Digilent Board Support Files for Vivado** 
     * Follow the [[vivado:boardfiles|Vivado Board Files for Digilent 7-Series FPGA Boards]] guide on how to install Board Support Files for Vivado.     * Follow the [[vivado:boardfiles|Vivado Board Files for Digilent 7-Series FPGA Boards]] guide on how to install Board Support Files for Vivado.
 +
 ----- -----
  
 ===== Downloads ===== ===== Downloads =====
-Cmod A7 Support Repository -- [[https://github.com/Digilent/CmodA7|GIT Repo]]+Cmod A7 15T OOB Project Repository -- [[https://github.com/Digilent/Cmod-A7-15T-OOB/releases/download/v2016.4-1/Cmod-A7-15T-OOB-2016.4-1.zip|ZIP Archive]] [[https://github.com/Digilent/Cmod-A7-15T-OOB|GIT Repo]]
  
 +Cmod A7 35T OOB Project Repository -- [[https://github.com/Digilent/Cmod-A7-35T-OOB/releases/download/v2018.2-1/Cmod-A7-35T-OOB-2018.2-1.zip
 +|ZIP Archive]] [[https://github.com/Digilent/Cmod-A7-35T-OOB|GIT Repo]]
 ------- -------
-===== How to... ===== 
  
  
 +===== Download and Launch the Cmod A7 Out of Box Demo =====
  
-==== 1. Generate the Project ==== +>1) Follow the [[:learn:programmable-logic:tutorials:github-demos:start:|Using Digilent Github Demo Projects]] Tutorial. Since this is a Vivado SDK Project, you can either directly launch SDK and import the hardware handoff, or you can generate a bitstream in Vivado before launching SDK. Select the hardware handoff options in the tutorial if you don't want to modify the project block design later. Return to this guide when prompted to check for additional hardware requirements and setup.
- +
->1.1) Download the repository linked in the download section and unzip it in the location of your choosing.  +
- +
->1.2) Generate the **User** project in the Projects folder by following this guide before continuing: [[vivado:github|How to Generate a Project from Digilent's Github]] +
- +
-==== 2. Build the Project ==== +
- +
->2.1) Click **Generate Bitstream** on the left hand menu towards the bottom. Vivado will run through both Run Synthesis and Run Implementation before it generates the bitstream automatically.  +
-> +
->Note: If you want, you can click each step by itself in the order of **Run Synthesis**, **Run Implementation** and then **Generate Bitstream**.+
 > >
->{{:basys3:buildflow.png?600|}}+><WRAP round important 660px> 
 +===Important=== 
 +Make sure that between the 15T and 35T versions of the project, you download the version that applies to your Cmod A7. 
 +</WRAP>
  
-==== 3. Program the Board ==== +>2) In order to fully use the demo, you will need to connect a serial terminal to your Cmod A7. Plug your board into your computer with a Micro USB cable and make sure it has power. Then open a serial terminal (such as TeraTerm) on your computer. In the terminal application setup the serial port to connect to the appropriate port for your board, with a baud rate of 9600. Then return to the Github Projects Tutorial to finish programming and running the demo.
- +
->3.1) Once you have generated your bit file, Click on the hardware manager and connect to your board by choosing the local server option.+
 > >
->{{:nexys4-ddr:deviceconnected.jpg?600|}}+>{{:learn:programmable-logic:tutorials:cmod-a7-user-demo:tera-setup.png?300|}} {{:learn:programmable-logic:tutorials:cmod-a7-user-demo:setup.png?300|}}
  
->3.2) Click program to load the project onto your Cmod A7. 
  
-==== 4. Export to SDK ====+===== Using the Cmod A7 Out of Box Demo =====
  
-Export the microblaze project by going to **File>Export>Export Hardware**. Click the check box to Include the bitstream, and export it local to project. This will create a .sdk folder in your project directory. Afterwards, click **File>Launch SDK** to launch Xilinx SDK.+==== 1. Observing the LEDs ====
  
- +>For this demo, every time **BTN1** is pressed, the LED state changes. The user LEDs create a 2 bit binary counter that increments every time the button is pressed. The RGB LED changes color every time the button is pressed.
-==== 5. Import the SDK files ==== +
- +
-In your project Explorer window on the left side, click **File>Import** then expand the General tab and click **Existing Projects into Workspace**. Navigate to the download folder, select the **sdk** folder, and click OK. In the //Import// window, click Finish to import the SDK project. +
- +
-==== 6. Program the FPGA ==== +
- +
-Click **Xilinx Tools>Program FPGA** and click **Program**. Xilinx SDK will then program the FPGA with a microblaze bit file. +
- +
-==== 4. Run the Project ==== +
- +
- +
-This portion will help you run the demo and observe all its features. +
- +
->4.1) Observing the different LED colors +
-> +
->For this demo, every time btn1 is pressed, the led state changes. The user LEDs create a 2 bit binary counter that increments every time the button is pressed. The RGB LED changes color every time the button is pressed.+
 > >
 >{{:cmod_a7:user_led0.jpg?200|}}{{:cmod_a7:user_led1.jpg?200|}}{{:cmod_a7:user_led2.jpg?200|}}{{:cmod_a7:user_led3.jpg?200|}} >{{:cmod_a7:user_led0.jpg?200|}}{{:cmod_a7:user_led1.jpg?200|}}{{:cmod_a7:user_led2.jpg?200|}}{{:cmod_a7:user_led3.jpg?200|}}
  
  
->4.2) UART +==== 2. UART Messages ==== 
-> + 
->Connect a terminal program with the settings 9600 baud rate, 8 bits, one stop bit, and no parity bit. On reset, the board will go through a memory test and will print out the result. If the memory is working, the following message will appear.+>Whenever the demo is started from Vivado SDK, the board will go through a memory test and will print out the result. If the memory is working, the following message will appear.
 > >
 >{{:cmod_a7:user_uart1.jpg?500|}} >{{:cmod_a7:user_uart1.jpg?500|}}
-> + 
->Also whenever a button is pressed, the message "Button Pressed" is sent over UART.+>Whenever a button is pressed, the message "Button Pressed" is sent over UART.
 > >
 >{{:cmod_a7:user_uart2.jpg?200|}} >{{:cmod_a7:user_uart2.jpg?200|}}
  
-{{tag>learn programmable-logic tutorial cmod-a7}}+{{tag>learn programmable-logic project cmod-a7}}