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Adding Digilent FPGA Boards to Multisim
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This guide will provide a step by step tutorial of how to add a Digilent FPGA board to Multisim. To program your FPGA board through Multisim, follow this guide: Programming Digilent FPGA Boards Through Multisim.
Prerequisites
- Multisim Education version 14.2, or higher
Note: This same process can be applied to earlier FPGA boards, but instead of Vivado, Xilinx ISE is required. This tutorial will only focus on utilizing Vivado.
Create and Modify the Configuration Files
Download the Constraints File
Multisim needs two configuration files specific for the chosen FPGA board. These two are an *.xdc and a *.mspc file. The xdc file is called constraints file (Xilinx Design Constraints) and contains the assignments of physical FPGA chip pins to HDL code. You can also think of this file like the name definitions for physical pins, so later, in your “code” you only have to use the name, not the pin number. For more information on constraints files, read: What is an XDC File? (Redirect).
For Digilent boards, you can find the xdc file specific to your board on the bottom right hand side of the board's resource center, or on this page. Download the file for your board.
Note: In this guide, an Arty-S7-50 will be used.
Note: If you are using an earlier board, compatible with Xilinx ISE, instead of the xdc file, you will need a *.ucf file.
Create the Configuration File
Open the downloaded constraints file in a text editor, then create an empty file, with the same name, but the *.mspc extension. This file will contain the available pins in Multisim PLD design.
First, create the header and the “body” of the file. The language is similar to HTML, is easily readable. For the file to be compatible with your board, you will have to change the Name, PartNumber, BoardName, Family, Device, Package and Ucf fields. You can leave the other fields as they are.
<PLDConfiguration Version="1.0"> <Component Name="Digilent Arty S7-50" PartNumber="XC7S50" Version="1.0" OpVoltageInput="3.3" OpVoltageOutput="3.3" OpVoltageBidirectional="3.3" BoardId=""> <DeviceList BoardName="Digilent Arty S7-50"> <XilinxDevice Manufacturer="Xilinx" Family="Spartan-7" Device="XC7S50" Package="CSGA324" Speed="-1" DeviceOffset="1" DeviceId="" Ucf="Arty-S7-50-Master.xdc" /> </DeviceList> <ProgrammingProperties> <Interface CableTarget="digilent_plugin"/> </ProgrammingProperties> <Pins Locked="1"> </Pins> </Component> </PLDConfiguration>
The Name and BoardName fields contain the name of the board. This is how the board will appear in Multisim.
The PartNumber and Device fields contain the name of the FPGA chip. This usually can be found in the board's Reference Manual, or you can find it by plugging in the board and starting Adept.
The Family of the FPGA chip appears in the board's Reference Manual. In this case, a Spartan-7 FPGA is used.
The Ucf field contains the name of the xdc file.
Modify the Constraints File
In the constraints file, delete the “#” mark before the lines describing the resources you want to use. Also change the name of these pins to names you can easily remember (the names shouldn't contain special characters).
Note: You can uncomment every resource, as long as there aren't any conflicts: shared pins for multiple resources, like ADC and digital I/O - conflicts are mentioned in the xdc file, in comments.
Fill in the Configuration File
The final step is to add the pins to Multisim, which can be done by adding the line below to the mspc file, for every pin.
<Pin Name="pin_name" Mode="pin_mode" Location="pin_location" Place="pin_placed" />
In the code snippet pin_name marks the name of the pin (which was set in the xdc file), pin_mode marks the mode in which the pin will be used (it can have the values “in”, “out” and “bidir”), pin_location can be “right”, or “left”, depending on which part of the sheet you want to place the pin (they can be moved later freely) and pin_placed marks if the pin is selected by default, or not (can have values “1”, or “0”).






