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learn:programmable-logic:tutorials:add_fpgas_to_multisim:start [2021/11/17 19:21] – ↷ Links adapted because of a move operation Arthur Brownlearn:programmable-logic:tutorials:add_fpgas_to_multisim:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 ====== Adding Digilent FPGA Boards to Multisim ====== ====== Adding Digilent FPGA Boards to Multisim ======
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-This page is under construction. 
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   * a [[https://digilent.com/shop/boards-and-components/system-boards/|Digilent FPGA trainer board]]   * a [[https://digilent.com/shop/boards-and-components/system-boards/|Digilent FPGA trainer board]]
-  * [[https://www.ni.com/ro-ro/support/downloads/software-products/download.multisim.html#312060|Multisim Education]] version 14.2, or higher +  * [[https://www.ni.com/ro-ro/support/downloads/software-products/download.multisim.html#312060|Multisim Education]] version 14.2 or higher 
-  * a text editor +  * Your favorite text editor 
-  * [[https://www.xilinx.com/products/design-tools/vivado.html|Xilinx Vivado]] - needed only for compiling, projects for boards not included originally in Multisim, can't be compiled by LabVIEW FPGA Compilation Tools +  * [[https://www.xilinx.com/products/design-tools/vivado.html|Xilinx Vivado]] 
-  * [[https://mautic.digilentinc.com/adept-system-download|Adept]] - //optional//+    * Only needed for compiling, projects for boards not included originally in Multisim, can't be compiled by LabVIEW FPGA Compilation Tools. 
 +  * [[https://mautic.digilentinc.com/adept-system-download|Adept]] 
 +    * Optional: Can be used to determine your board's FPGA part.
  
 **Note:** //This same process can be applied to earlier FPGA boards, but instead of Vivado, [[https://www.xilinx.com/products/design-tools/ise-design-suite.html|Xilinx ISE]] is required. This tutorial will only focus on utilizing Vivado.// **Note:** //This same process can be applied to earlier FPGA boards, but instead of Vivado, [[https://www.xilinx.com/products/design-tools/ise-design-suite.html|Xilinx ISE]] is required. This tutorial will only focus on utilizing Vivado.//
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 ==== Download the Constraints File ==== ==== Download the Constraints File ====
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-Multisim needs two configuration files specific for the chosen FPGA board. These two are an ***.xdc** and a ***.mspc** file. The xdc file is called constraints file (Xilinx Design Constraints) and contains the assignments of physical FPGA chip pins to HDL code. You can also think of this file like the name definitions for physical pins, so later, in your "code" you only have to use the name, not the pin number. For more information on constraints files, read: [[programmable-logic:guides:vivado-xdc-file]].+Multisim needs two configuration files specific to the chosen FPGA board. These two are an ***.xdc** and a ***.mspc** file. The xdc file is called a constraints file (standing for Xilinx Design Constraints) and contains the location constraints assigning physical FPGA chip pins to port names in HDL code. You can also think of this file like the name definitions for physical pins, so later, in your "code" you only have to use the name, not the pin number. For more information on constraints files, read: [[programmable-logic:guides:vivado-xdc-file|]].
  
-For Digilent boards, you can find the xdc file specific to your board on the bottom right hand side of the board's resource center, or on [[https://github.com/Digilent/digilent-xdc|this]] page. Download the file for your board.+For Digilent boards, you can find the xdc file specific to your board on the board's resource center, or, for all boards actively supported in Vivado, in the [[https://github.com/Digilent/digilent-xdc|digilent-xdc]] repository on Github. You can get a ZIP file containing all of the most recent versions of the XDC files in digilent-xdc here: {{https://github.com/Digilent/digilent-xdc/archive/refs/heads/master.zip}}. Download the file for your board.
  
 **Note:** //In this guide, an Arty-S7-50 will be used.// **Note:** //In this guide, an Arty-S7-50 will be used.//
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 ==== Create the Configuration File ==== ==== Create the Configuration File ====
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-Open the downloaded constraints file in a text editor, then create an empty file, with the same name, but the ***.mspc** extension. This file will contain the available pins in Multisim PLD design.+Open the downloaded constraints file in a text editor, then create an empty file with the same base name and the ***.mspc** extension (replacing the ".xdc"). This file will contain the available pins in Multisim PLD design.
  
-First, create the header and the "body" of the file. The language is similar to HTML, is easily readable. For the file to be compatible with your board, you will have to change the **Name**, **PartNumber**, **BoardName**, **Family**, **Device**, **Package** and **Ucf** fields. You can leave the other fields as they are.+First, create the header and the "body" of the file. The language is similar to HTML, and is easily readable. For the file to be compatible with your board, you will have to change the **Name**, **PartNumber**, **BoardName**, **Family**, **Device**, **Package**, and **Ucf** fields. You can leave the other fields as they are.
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 <code html> <code html>
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-The most tricky property is the **Package**. You can search the Reference Manual for information about the package of the chip, or you can take a look on the chip itself, or the sticker placed on the chip (the sticker might contain other information as well).+The trickiest property is the **Package**. You can check the Resource Center's feature list (linked from the [[/programmable-logic/start]] page of this site), search the Reference Manual for information about the package of the chip, or take a look on the chip itself or the sticker placed on the chip (the sticker might contain other information as well).
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 {{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:arty-s7.jpg?600 |}} {{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:arty-s7.jpg?600 |}}
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 ==== Modify the Constraints File ==== ==== Modify the Constraints File ====
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-In the constraints file, delete the "#" mark before the lines describing the resources you want to use. Also change the name of these pins to names you can easily remember (the names shouldn't contain special characters).+In the constraints file, uncomment the lines describing the resources you want to use by deleting the "#" mark at the beginning of each of the lines. Also change the name of these pins to names you can easily remember (the names shouldn't contain special characters).
  
 **Note:** //You can uncomment every resource, as long as there aren't any conflicts: shared pins for multiple resources, like ADC and digital I/O - conflicts are mentioned in the xdc file, in comments.// **Note:** //You can uncomment every resource, as long as there aren't any conflicts: shared pins for multiple resources, like ADC and digital I/O - conflicts are mentioned in the xdc file, in comments.//
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-{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:xdc_modified.png?600 |}}+{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:xdc_modified_low_res.png?600 |}}
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 <code html><Pin Name="pin_name" Mode="pin_mode" Location="pin_location" Place="pin_placed" /></code> <code html><Pin Name="pin_name" Mode="pin_mode" Location="pin_location" Place="pin_placed" /></code>
  
-In the code snippet **pin_name** marks the name of the pin (which was set in the xdc file), **pin_mode** marks the mode in which the pin will be used (it can have the values **"in"**, **"out"** and **"bidir"**), **pin_location** can be **"right"**, or **"left"**, depending on which part of the sheet you want to place the pin (they can be moved later freely) and **pin_placed** marks if the pin is selected by default, or not (can have values **"1"**, or **"0"**).+In the code snippet, **pin_name** marks the name of the pin (which was set in the xdc file), **pin_mode** marks the mode in which the pin will be used (it can have the values **"in"**, **"out"**, or **"bidir"**), **pin_location** can be **"right"** or **"left"**, depending on which part of the sheet you want to place the pin on (they can be moved freely later) and **pin_placed** marks if the pin is selected by default or not (can have the values **"1"** or **"0"**).
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-{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:mspc.png?600 |}}+{{ :learn:programmable-logic:tutorials:add_fpgas_to_multisim:mspc_low_res.png?600 |}}
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