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| learn:microprocessor:tutorials:pic32-interrupts:start [2017/12/18 20:17] – Martha | learn:microprocessor:tutorials:pic32-interrupts:start [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| ==== Inventory ==== | ==== Inventory ==== | ||
| - | * 1 [[http://store.digilentinc.com/ | + | * 1 [[https://digilent.com/shop/ |
| * [[http:// | * [[http:// | ||
| - | * 1 [[http://store.digilentinc.com/ | + | * 1 [[https://digilent.com/shop/ |
| * 1 Stepper Motor (5V – 12V, 25 Ω, unipolar or bi-polar) | * 1 Stepper Motor (5V – 12V, 25 Ω, unipolar or bi-polar) | ||
| - | * 1 Logic analyzer or oscilloscope (Digilent [[http://store.digilentinc.com/ | + | * 1 Logic analyzer or oscilloscope (Digilent [[https://digilent.com/ |
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| Change notice (CN) interrupts are generated on selected enabled digital I/O pins whenever the voltage of the pin changes, causing the processor to read a logic value that is different from the previous reading of the PORT register. Pins designated as CN interrupt pins are shown in Table 1. Only BTN1 and BTN2 on the Digilent Pro MX7 processor board have the capability to generate CN interrupts. The I/O pin associated with BTN3 cannot generate a CN interrupt. | Change notice (CN) interrupts are generated on selected enabled digital I/O pins whenever the voltage of the pin changes, causing the processor to read a logic value that is different from the previous reading of the PORT register. Pins designated as CN interrupt pins are shown in Table 1. Only BTN1 and BTN2 on the Digilent Pro MX7 processor board have the capability to generate CN interrupts. The I/O pin associated with BTN3 cannot generate a CN interrupt. | ||
| - | ^ Port | + | ^ CNx |^ Port ^ |
| - | | RC13 | + | | CN0 || RC13 | |
| - | | RC14 | + | | CN1 || RC14 | |
| - | | RB0 | | | + | | CN2 || RB0 | |
| - | | RB1 | | | + | | CN3 || RB1 | |
| - | | RB2 | | | + | | CN4 || RB2 | |
| - | | RB3 | | | + | | CN5 || RB3 | |
| - | | RB4 | | | + | | CN6 || RB4 | |
| - | | RB5 | | | + | | CN7 || RB5 | |
| - | | RG6 — BTN1 | + | | CN8 || RG6 — BTN1 | |
| - | | RG7 — BTN2 | + | | CN9 || RG7 — BTN2 | |
| - | | RG8 | | | + | | CN10 || RG8 | |
| - | | RG9 | | | + | | CN11 || RG9 | |
| - | | RB15 | + | | CN12 || RB15 | |
| - | | RD4 | | | + | | CN13 || RD4 | |
| - | | RD5 | | | + | | CN14 || RD5 | |
| - | | RD6 | | | + | | CN15 || RD6 | |
| - | | RD7 | | | + | | CN16 || RD7 | |
| - | | RF4 | | | + | | CN17 || RF4 | |
| - | | RF5 | | | + | | CN18 || RF5 | |
| - | | | + | | CN19 || N/A | |
| - | {{tag> | + | **Table 1. I/O pins with CN interrupt capability.** |
| + | |||
| + | CN interrupts can be disabled to protect segments of code using mCNIntEnable(0); | ||
| + | |||
| + | **Listing 4.** Initializing CHANGE NOTICE interrupts. | ||
| + | < | ||
| + | /* Declaration of interrupt ISR for CN at interrupt level 1 */ | ||
| + | void cn_interrupt_initialize(void) // This code is executed only once | ||
| + | { | ||
| + | |||
| + | // BTN1 and BTN2 pins are set as inputs by including the file | ||
| + | // chipKit_Pro_MX7.h and calling chipKit_Pro_MX7_Setup(); | ||
| + | // PORTSetPinsDigitalIn(BIT_6 | BIT7); | ||
| + | |||
| + | // Enable CN for BTN1 and BTN2 | ||
| + | mCNOpen(CN_ON, | ||
| + | |||
| + | // Set CN interrupts priority level 1 sub priority level 0 | ||
| + | mCNSetIntPriority(1); | ||
| + | mCNSetIntSubPriority(0); | ||
| + | mCNIntEnable(1); | ||
| + | |||
| + | // Global interrupts must enabled to complete the initialization. | ||
| + | } | ||
| + | </ | ||
| + | |||
| + | A single interrupt vector is used for all CN interrupts. The interrupt does not tell you if the pin went high or low; only that the condition on one of the selected pins has changed. The ISR code must return a type void and have no parameters passed to it. The CN interrupt flag must be cleared prior to exiting the ISR using the instructions mCNClearIntFlag(); | ||
| + | |||
| + | **Listing 5.** Change Notice interrupt service routine. | ||
| + | < | ||
| + | void __ISR(__CHANGE_NOTICE_VECTOR, | ||
| + | { | ||
| + | /* User ISR code inserted here */ | ||
| + | |||
| + | /* Required to clear the interrupt flag in the ISR */ | ||
| + | mCNClearIntFlag(); | ||
| + | } | ||
| + | </ | ||
| + | |||
| + | ---- | ||
| + | |||
| + | ===== Project Tasks ===== | ||
| + | This project implements a system that runs entirely using foreground processes. The Timer 1 interrupt is used to generate an interrupt once each millisecond. The PIC32 change notice interrupt generates an interrupt when a button is pressed or released. The project consists of writing a program that meets the specifications listed below: | ||
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| + | ---- | ||
| + | |||
| + | ===== Project Testing ===== | ||
| + | There are significant timing requirements for this project: the Timer 1 interrupt rate, the stepper motor step rate, and the button debounce delay. Table 2 is provided below to assist you in determining where to place the instructions to control the instrumentation LEDs. The red tab above shows where to connect an oscilloscope or logic analyzer to the test points for LEDA through LEDC on the PmodSTEP to instrument this project. An example of a logic analyzer screen capture is shown below in Fig. 1. | ||
| + | |||
| + | | LED ^ Operation | ||
| + | | LEDA | Toggle | ||
| + | | LEDB | Toggle | ||
| + | | LEDC | SET (on) | Start of CN ISR | | ||
| + | | LEDC | Cleared (off) | End of CN ISR | | ||
| + | |||
| + | **Table 2. Instrumentation LED Operations.** | ||
| + | |||
| + | {{ : | ||
| + | Figure 1. Screen capture for the instrumentation of Project 5. Screenshot of Digilent WaveForms running on Microsoft Windows 7. | ||
| + | |||
| + | ---- | ||
| + | |||
| + | ===== Test Your Knowledge! ===== | ||
| + | Now that you've completed this project, you should look at the following questions/ | ||
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