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learn:courses:unit-4-lab4c:start [2017/04/13 20:45] – [5.2. SPI Communications] Marthalearn:courses:unit-4-lab4c:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 ====== Lab 4c: Communications - SPI Serial Protocols ====== ====== Lab 4c: Communications - SPI Serial Protocols ======
 +[[{}/learn/courses/unit-4-1/start|Back to Unit 4 Part 1]]
 +[[{}/learn/courses/unit-4-2/start|Back to Unit 4 Part 2]]
 +[[{}/learn/courses/unit-4-lab4b/start|Back to Lab 4b]]
  
 === Download This Document === === Download This Document ===
-  * {{ :learn:courses:unit-4-lab4c:lab_4c.pdf |Lab 4c PDF}}+{{ :learn:courses:unit-4-lab4c:lab_4c.pdf |Lab 4c PDF}}
  
  
 ===== 1. Objectives ===== ===== 1. Objectives =====
-  * Learn how to configure an SPI channel on the PIC32MX370 processor. +  - Learn how to configure an SPI channel on the PIC32MX370 processor. 
-  * Learn the difference between software and hardware handshaking. +  - Learn the difference between software and hardware handshaking. 
-  * Learn how to communicate with an SPI FLASH memory device.+  - Learn how to communicate with an SPI FLASH memory device.
  
  
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 ===== 2. Basic Knowledge ===== ===== 2. Basic Knowledge =====
-  * How to configure I/O pins on a Microchip PIC32 PPS microprocessor. +  - How to configure I/O pins on a Microchip PIC32 PPS microprocessor. 
-  * How to configure the Analog Discovery 2 to display logic traces. +  - How to configure the Analog Discovery 2 to display logic traces. 
-  * How to implement code reuse that integrates previously developed processor code into new application projects.+  - How to implement code reuse that integrates previously developed processor code into new application projects.
  
  
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 ===== 3. Equipment List ===== ===== 3. Equipment List =====
 ==== 3.1. Hardware ==== ==== 3.1. Hardware ====
-  * [[http://store.digilentinc.com/basys-mx3-pic32mx-trainer-board-recommended-for-embedded-systems-courses/|Basys MX3 trainer board]] +  - [[https://digilent.com/shop/basys-mx3-pic32mx-trainer-board-for-embedded-systems-courses/|Basys MX3 trainer board]] 
-  * Workstation computer running Windows 10 or higher, MAC OS, or Linux +  - Workstation computer running Windows 10 or higher, MAC OS, or Linux 
-  * 2 [[http://store.digilentinc.com/usb-a-to-micro-b-cable/|Standard USB A to micro-B cables]]+  - 2 [[https://digilent.com/shop/usb-a-to-micro-b-cable/|Standard USB A to micro-B cables]]
  
 In addition, we suggest the following instruments: In addition, we suggest the following instruments:
-  * [[http://store.digilentinc.com/analog-discovery-2-100msps-usb-oscilloscope-logic-analyzer-and-variable-power-supply/|Analog Discovery 2]]+  - [[https://digilent.com/shop/analog-discovery-2-100ms-s-usb-oscilloscope-logic-analyzer-and-variable-power-supply/|Analog Discovery 2]]
  
 ==== 3.2. Software ==== ==== 3.2. Software ====
 The following programs must be installed on your development work station: The following programs must be installed on your development work station:
  
-  * [[http://www.microchip.com/mplab/mplab-x-ide|Microchip MPLAB X® v3.35 or higher]] +  - [[http://www.microchip.com/mplab/mplab-x-ide|Microchip MPLAB X® v3.35 or higher]] 
-  * [[http://www.microchip.com/SWLibraryWeb/product.aspx?product=PIC32%20Peripheral%20Library|PLIB Peripheral Library]] +  - [[http://www.microchip.com/SWLibraryWeb/product.aspx?product=PIC32%20Peripheral%20Library|PLIB Peripheral Library]] 
-  * [[http://www.microchip.com/xcdemo/xcpluspromo.aspx|XC32 Cross Compiler]] +  - [[http://www.microchip.com/xcdemo/xcpluspromo.aspx|XC32 Cross Compiler]] 
-  * [[http://store.digilentinc.com/waveforms-2015-download-only/|WaveForms 2015]]  +  - [[https://digilent.com/shop/software/digilent-waveforms/|WaveForms]]  
-  * [[http://www.putty.org/|PuTTY Terminal Emulation]]+  - [[http://www.putty.org/|PuTTY Terminal Emulation]]
  
 ---- ----
  
 ===== 4. Project Takeaways ===== ===== 4. Project Takeaways =====
-  * Understanding of requirements and implementations of synchronous communications. +  - Understanding of requirements and implementations of synchronous communications. 
-  * Understanding of the SPI protocol. +  - Understanding of the SPI protocol. 
-  * How to generate instruction sets for controlling SPI devices.+  - How to generate instruction sets for controlling SPI devices.
  
 ---- ----
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 Figure 7.1 shows the signal connections to the S25FL132K flash memory IC. Table 7.1 lists the PIC32MX370 processor pins that these signals are connected to. The PIC32 processor pin for the SPI_CE signal is configured as a digital output pin, as shown in Listing B.1. To implement the wiring configuration shown in Fig. 7.1, processor I/O pins PORT F:2 and PORTF:7 are mapped to SPI1T and SPI1R respectively using the first two statements in Listing B.2 in Appendix B. The PIC32MX370 PORTF:6 has a fixed assignment to SCK1. Figure 7.1 shows the signal connections to the S25FL132K flash memory IC. Table 7.1 lists the PIC32MX370 processor pins that these signals are connected to. The PIC32 processor pin for the SPI_CE signal is configured as a digital output pin, as shown in Listing B.1. To implement the wiring configuration shown in Fig. 7.1, processor I/O pins PORT F:2 and PORTF:7 are mapped to SPI1T and SPI1R respectively using the first two statements in Listing B.2 in Appendix B. The PIC32MX370 PORTF:6 has a fixed assignment to SCK1.
  
-{{ :learn:courses:unit-4-lab4c:lab4c-fig-7-1.png?nolink&500 |Figure 7.1. SPI flash memory IC schematic diagram.}}+{{ :learn:courses:unit-4-lab4c:lab_4c_fig_7_1.jpg?nolink&400 |Figure 7.1. SPI flash memory IC schematic diagram.}}
 //Figure 7.1. SPI flash memory IC schematic diagram.// //Figure 7.1. SPI flash memory IC schematic diagram.//
  
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 Using the SPI initialization shown in Listing B.2, the PIC32 processor is configured for SPI Mode 0 operation. Figure 7.2 shows that the bit output is held constant when the clock pulse makes a positive transition. Figure 7.2 also shows that the bit rate is 1 MHz. Using the SPI initialization shown in Listing B.2, the PIC32 processor is configured for SPI Mode 0 operation. Figure 7.2 shows that the bit output is held constant when the clock pulse makes a positive transition. Figure 7.2 also shows that the bit rate is 1 MHz.
  
-{{ :learn:courses:unit-4-lab4c:lab4c-fig-7-2.png?nolink&800 |Figure 7.2. SPI Bit timing for Mode 0 configuration.}}+{{ :learn:courses:unit-4-lab4c:lab_4c_fig_7_2.png?nolink |Figure 7.2. SPI Bit timing for Mode 0 configuration.}}
 //Figure 7.2. SPI Bit timing for Mode 0 configuration.// //Figure 7.2. SPI Bit timing for Mode 0 configuration.//
 +
  
 As Fig. A.2 shows, the same SPIxSR serial shift buffer is used for input and output, thus requiring the common SCKx clock signal. Hence, when a byte of data is shifted out of the SDOx pin, data is also being shifted into the SPIxSR from the SDIx pin. In other words, to receive SPI serial data, you must send SPI serial data.  As Fig. A.2 shows, the same SPIxSR serial shift buffer is used for input and output, thus requiring the common SCKx clock signal. Hence, when a byte of data is shifted out of the SDOx pin, data is also being shifted into the SPIxSR from the SDIx pin. In other words, to receive SPI serial data, you must send SPI serial data. 
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 | Program Security Registers<sup>(3)</sup>              | 42h                   | A23-A16       | A15-A8       | A7-A0     | D7-D0, …       |             | | Program Security Registers<sup>(3)</sup>              | 42h                   | A23-A16       | A15-A8       | A7-A0     | D7-D0, …       |             |
  
-{{ :learn:courses:unit-4-lab4c:lab4c-fig-7-3.png?nolink&800 |Figure 7.3. Release Power Down/Read Device ID SPI transaction.}}+{{ :learn:courses:unit-4-lab4c:lab_4c_fig_7_3.png?nolink |Figure 7.3. Release Power Down/Read Device ID SPI transaction.}}
 //Figure 7.3. Release Power Down/Read Device ID SPI transaction.// //Figure 7.3. Release Power Down/Read Device ID SPI transaction.//
  
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 | Continuous Read Mode Reset<sup>(6)</sup>  | FFh                   | FFh                |                             |                 |             |                 | | Continuous Read Mode Reset<sup>(6)</sup>  | FFh                   | FFh                |                             |                 |             |                 |
  
- +{{ :learn:courses:unit-4-lab4c:lab_4c_fig_7_4.png?nolink |Figure 7.4. SPI Flash Read Byte command and three-byte address followed by reading data 'A', 'B', 'C', etc.}}
-{{ :learn:courses:unit-4-lab4c:lab4c-fig-7-4.png?nolink&800 |Figure 7.4. SPI Flash Read Byte command and three-byte address followed by reading data 'A', 'B', 'C', etc.}} +
 //Figure 7.4. SPI Flash Read Byte command and three-byte address followed by reading data 'A', 'B', 'C', etc.// //Figure 7.4. SPI Flash Read Byte command and three-byte address followed by reading data 'A', 'B', 'C', etc.//
  
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 //Figure A.1. Unit 4 hardware and instrumentation configuration.// //Figure A.1. Unit 4 hardware and instrumentation configuration.//
  
-{{ :learn:courses:unit-4-lab4c:part2-fig-a-1.png?nolink&800 |Figure A.2. SPI block diagram from the Microchip PIC32MX370 data sheet.}} 
-//Figure A.2. SPI block diagram from the Microchip PIC32MX370 data sheet.// 
  
 ---- ----
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 </code> </code>
  
 +----
 +
 +[[{}/learn/courses/unit-4-1/start|Back to Unit 4 Part 1]]
 +[[{}/learn/courses/unit-4-2/start|Back to Unit 4 Part 2]]
 +[[{}/learn/courses/unit-4-lab4b/start|Back to Lab 4b]]
 +[[{}/learn/courses/unit-4-lab4d/start|Go to Lab 4d]]
 +[[{}/learn/courses/unit-5/start|Go to Unit 5]]