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learn:courses:microprocessor-io-lab-1a:start [2017/05/12 18:29] – [Lab 1a: Microprocessor IO] Talesa Bleythinglearn:courses:microprocessor-io-lab-1a:start [2022/10/04 11:38] (current) – external edit 127.0.0.1
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 ===== 3. Equipment List ===== ===== 3. Equipment List =====
 ==== 3.1. Hardware ==== ==== 3.1. Hardware ====
-  - [[http://store.digilentinc.com/basys-mx3-pic32mx-trainer-board-recommended-for-embedded-systems-courses/|Basys MX3 trainer board]] +  - [[https://digilent.com/shop/basys-mx3-pic32mx-trainer-board-for-embedded-systems-courses/|Basys MX3 trainer board]] 
-  - [[http://store.digilentinc.com/usb-a-to-micro-b-cable/|Standard USB A to micro-B cable]]+  - [[https://digilent.com/shop/usb-a-to-micro-b-cable/|Standard USB A to micro-B cable]]
   - Workstation computer running Windows 10 or higher, MAC OS, or Linux   - Workstation computer running Windows 10 or higher, MAC OS, or Linux
  
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 In this lab, we will make use of the TRISx, LATx, and PORTx control registers. TRISx registers simply control the data direction flow through port I/O pins, e.g., whether a PORTx I/O pin is an input or an output. If the data direction bit is a “1,” then the corresponding PORTx I/O pin is an input, and vice versa.  In this lab, we will make use of the TRISx, LATx, and PORTx control registers. TRISx registers simply control the data direction flow through port I/O pins, e.g., whether a PORTx I/O pin is an input or an output. If the data direction bit is a “1,” then the corresponding PORTx I/O pin is an input, and vice versa. 
  
-LATx registers (PORTx data latch) hold data written to port I/O pins. A write to a LATx register latches data to the corresponding port I/O pins and those I/O port pins configured as outputs are updated. A read from a LATx resister reads the data held in the PORTx data latch, not directly from the port I/O pins (this distinction will come into play in [[https://reference.digilentinc.com/learn/courses/microprocessor-io-lab-1b/start|Lab 1b]]). +LATx registers (PORTx data latch) hold data written to port I/O pins. A write to a LATx register latches data to the corresponding port I/O pins and those I/O port pins configured as outputs are updated. A read from a LATx resister reads the data held in the PORTx data latch, not directly from the port I/O pins (this distinction will come into play in [[/learn/courses/microprocessor-io-lab-1b/start|Lab 1b]]). 
  
 PORTx registers are the registers that allow I/O pins to be accessed. A write to a PORTx register writes to the corresponding LATx register (PORTx data latch) and those I/O port pins configured as outputs are updated. This is effectively the same as writing to a LATx register. A read from a PORTx register reads the synchronized signal applied to the port I/O pins.  PORTx registers are the registers that allow I/O pins to be accessed. A write to a PORTx register writes to the corresponding LATx register (PORTx data latch) and those I/O port pins configured as outputs are updated. This is effectively the same as writing to a LATx register. A read from a PORTx register reads the synchronized signal applied to the port I/O pins.