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| learn:courses:microprocessor-io-lab-1a:start [2017/04/14 18:38] – Martha | learn:courses:microprocessor-io-lab-1a:start [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| == Download This Document == | == Download This Document == | ||
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| ===== 3. Equipment List ===== | ===== 3. Equipment List ===== | ||
| ==== 3.1. Hardware ==== | ==== 3.1. Hardware ==== | ||
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| In addition, we suggest the following instruments: | In addition, we suggest the following instruments: | ||
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| ==== 3.2. Software: ==== | ==== 3.2. Software: ==== | ||
| The following programs must be installed on your development work station: | The following programs must be installed on your development work station: | ||
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| In this lab, we will make use of the TRISx, LATx, and PORTx control registers. TRISx registers simply control the data direction flow through port I/O pins, e.g., whether a PORTx I/O pin is an input or an output. If the data direction bit is a “1,” then the corresponding PORTx I/O pin is an input, and vice versa. | In this lab, we will make use of the TRISx, LATx, and PORTx control registers. TRISx registers simply control the data direction flow through port I/O pins, e.g., whether a PORTx I/O pin is an input or an output. If the data direction bit is a “1,” then the corresponding PORTx I/O pin is an input, and vice versa. | ||
| - | LATx registers (PORTx data latch) hold data written to port I/O pins. A write to a LATx register latches data to the corresponding port I/O pins and those I/O port pins configured as outputs are updated. A read from a LATx resister reads the data held in the PORTx data latch, not directly from the port I/O pins (this distinction will come into play in [[https:// | + | LATx registers (PORTx data latch) hold data written to port I/O pins. A write to a LATx register latches data to the corresponding port I/O pins and those I/O port pins configured as outputs are updated. A read from a LATx resister reads the data held in the PORTx data latch, not directly from the port I/O pins (this distinction will come into play in [[/ |
| PORTx registers are the registers that allow I/O pins to be accessed. A write to a PORTx register writes to the corresponding LATx register (PORTx data latch) and those I/O port pins configured as outputs are updated. This is effectively the same as writing to a LATx register. A read from a PORTx register reads the synchronized signal applied to the port I/O pins. | PORTx registers are the registers that allow I/O pins to be accessed. A write to a PORTx register writes to the corresponding LATx register (PORTx data latch) and those I/O port pins configured as outputs are updated. This is effectively the same as writing to a LATx register. A read from a PORTx register reads the synchronized signal applied to the port I/O pins. | ||
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| - The initialization section configures executes only once and sets up processor resources for the particular application. Typically, IO pins are configured to be analog or digital. If the pin is declared as digital, it is configured as input. Other resources such as timers, serial ports, and interrupts are also configured in this section. | - The initialization section configures executes only once and sets up processor resources for the particular application. Typically, IO pins are configured to be analog or digital. If the pin is declared as digital, it is configured as input. Other resources such as timers, serial ports, and interrupts are also configured in this section. | ||
| - The run section must contain an infinite software loop that, under no condition, must ever end. Typically this infinite loop is written as for(;;){ … } or while(1){ …}. The embedded application executes from the infinite loop or from interrupts that preempt this loop. | - The run section must contain an infinite software loop that, under no condition, must ever end. Typically this infinite loop is written as for(;;){ … } or while(1){ …}. The embedded application executes from the infinite loop or from interrupts that preempt this loop. | ||
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