Differences
This shows you the differences between two versions of the page.
| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| genesys:mig [2015/05/27 22:26] – Sam Lowe | genesys:mig [2022/10/04 11:38] (current) – external edit 127.0.0.1 | ||
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| Line 96: | Line 96: | ||
| Do the same thing for the mig.prj located at project_name/ | Do the same thing for the mig.prj located at project_name/ | ||
| - | Here is the edited | + | Here is the edited |
| {{: | {{: | ||
| Line 146: | Line 146: | ||
| CLK0_OUT -> clk0 | CLK0_OUT -> clk0 | ||
| + | |||
| CLKDV_OUT -> clkdiv0 | CLKDV_OUT -> clkdiv0 | ||
| + | |||
| CLKFX_OUT -> clk200 | CLKFX_OUT -> clk200 | ||
| + | |||
| CLK90_OUT -> clk90 | CLK90_OUT -> clk90 | ||
| + | ==== The Example Project ==== | ||
| + | Using these wizards and the example project, here is the working project on the Genesys board. LED1 is tied to Error and should not illuminate. LED 0 should illuminate. The bit file will be found under Genesys_MIG\ipcore_dir\mem\example_design\par. Digilent' | ||
| + | {{: | ||

