<?xml version="1.0" encoding="UTF-8"?>
<!-- generator="FeedCreator 1.8" -->
<?xml-stylesheet href="https://dev-wiki.digilent.com/lib/exe/css.php?s=feed" type="text/css"?>
<rdf:RDF
    xmlns="http://purl.org/rss/1.0/"
    xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
    xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
    xmlns:dc="http://purl.org/dc/elements/1.1/">
    <channel rdf:about="https://dev-wiki.digilent.com/feed.php">
        <title>Digilent Reference programmable-logic:arty-z7</title>
        <description></description>
        <link>https://dev-wiki.digilent.com/</link>
        <image rdf:resource="https://dev-wiki.digilent.com/ttps://dev-wiki.digilent.com/lib/tpl/digilent-tpl/images/favicon.ico" />
       <dc:date>2026-10-23T08:18:09+00:00</dc:date>
        <items>
            <rdf:Seq>
                <rdf:li rdf:resource="https://dev-wiki.digilent.com/programmable-logic/arty-z7/arty-z7-10-oob?rev=1664883526&amp;do=diff"/>
                <rdf:li rdf:resource="https://dev-wiki.digilent.com/programmable-logic/arty-z7/arty-z7-20-oob?rev=1664883526&amp;do=diff"/>
                <rdf:li rdf:resource="https://dev-wiki.digilent.com/programmable-logic/arty-z7/intro-to-fpga?rev=1664883526&amp;do=diff"/>
                <rdf:li rdf:resource="https://dev-wiki.digilent.com/programmable-logic/arty-z7/reference-manual?rev=1664883526&amp;do=diff"/>
                <rdf:li rdf:resource="https://dev-wiki.digilent.com/programmable-logic/arty-z7/start?rev=1664883526&amp;do=diff"/>
            </rdf:Seq>
        </items>
    </channel>
    <image rdf:about="https://dev-wiki.digilent.com/ttps://dev-wiki.digilent.com/lib/tpl/digilent-tpl/images/favicon.ico">
        <title>Digilent Reference</title>
        <link>https://dev-wiki.digilent.com/</link>
        <url>https://dev-wiki.digilent.com/ttps://dev-wiki.digilent.com/lib/tpl/digilent-tpl/images/favicon.ico</url>
    </image>
    <item rdf:about="https://dev-wiki.digilent.com/programmable-logic/arty-z7/arty-z7-10-oob?rev=1664883526&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2022-10-04T11:38:46+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>Arty Z7-10 Out-of-Box Demo</title>
        <link>https://dev-wiki.digilent.com/programmable-logic/arty-z7/arty-z7-10-oob?rev=1664883526&amp;do=diff</link>
        <description>Arty Z7-10 Out-of-Box Demo

project arty-z7</description>
    </item>
    <item rdf:about="https://dev-wiki.digilent.com/programmable-logic/arty-z7/arty-z7-20-oob?rev=1664883526&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2022-10-04T11:38:46+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>Arty Z7-20 Out-of-Box Demo</title>
        <link>https://dev-wiki.digilent.com/programmable-logic/arty-z7/arty-z7-20-oob?rev=1664883526&amp;do=diff</link>
        <description>Arty Z7-20 Out-of-Box Demo

project arty-z7</description>
    </item>
    <item rdf:about="https://dev-wiki.digilent.com/programmable-logic/arty-z7/intro-to-fpga?rev=1664883526&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2022-10-04T11:38:46+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>Intro to FPGA and the Arty Z7 Featuring Adam Taylor</title>
        <link>https://dev-wiki.digilent.com/programmable-logic/arty-z7/intro-to-fpga?rev=1664883526&amp;do=diff</link>
        <description>Intro to FPGA and the Arty Z7 Featuring Adam Taylor

This video series was created by Adam Taylor and introduces many fundamental concepts of FPGA design, proceeding up the tech stack from the fundamental bare-bones hardware elements included in Xilinx FPGAs, up through Zynq and Ultrascale architectures including processors, and some of the varied operating systems and software applications that can be run on these parts.</description>
    </item>
    <item rdf:about="https://dev-wiki.digilent.com/programmable-logic/arty-z7/reference-manual?rev=1664883526&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2022-10-04T11:38:46+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>Arty Z7 Reference Manual</title>
        <link>https://dev-wiki.digilent.com/programmable-logic/arty-z7/reference-manual?rev=1664883526&amp;do=diff</link>
        <description>Arty Z7 Reference Manual

The Arty Z7 is a ready-to-use development platform designed around the Zynq-7000™ All Programmable System-on-Chip (AP SoC) from Xilinx. The Zynq-7000 architecture tightly integrates a dual-core, 650 MHz ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. This pairing grants the ability to surround a powerful processor with a unique set of software defined peripherals and controllers, tailored by you for the target application.</description>
    </item>
    <item rdf:about="https://dev-wiki.digilent.com/programmable-logic/arty-z7/start?rev=1664883526&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2022-10-04T11:38:46+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>Arty Z7</title>
        <link>https://dev-wiki.digilent.com/programmable-logic/arty-z7/start?rev=1664883526&amp;do=diff</link>
        <description>Arty Z7



The Arty Z7 is a ready-to-use development platform designed around the Zynq-7000™ All Programmable System-on-Chip (AP SoC) from Xilinx. The Zynq-7000 architecture tightly integrates a dual-core, 650 MHz ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. This pairing grants the ability to surround a powerful processor with a unique set of software defined peripherals and controllers, tailored by you for the target application.</description>
    </item>
</rdf:RDF>
