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Generated by MIG MIG Version 1.9
Coregen 14.5 - Build Number P.20131013 on Mon Feb 17 17:33:28 2014


Creating the directory 
C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design
Created the UCF file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/example_top.ucf Successfully
Created the SDC file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/example_top.xdc Successfully
Copied the Traffic Gen Files Successfully
Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/../docs/phy_only_support_readme.txt Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/create_ise.bat Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/makeproj.bat Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/rem_files.bat Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/ise_flow.bat Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/rem_files.tcl Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/set_ise_prop.tcl Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/readme.txt Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/xst_options.txt Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/ddr_icon_cg.xco Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/ddr_ila_basic_cg.xco Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/ddr_ila_wrpath_cg.xco Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/ddr_ila_rdpath_cg.xco Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/ddr_vio_sync_async_out72_cg.xco Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/ddr_vio_async_in_sync_out_cg.xco Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/par/example_top.cpj Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/ddr2_model.v Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/ddr2_model_parameters.vh Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/xsim_files.prj Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/xsim_options.tcl Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/xsim_run.bat Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/readme.txt Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/sim.do Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/sim_tb_top.v Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/wiredly.v Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/synth/example_top.lso Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/synth/example_top.prj Successfully
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Created the file - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/synth/synplify_pro.tcl Successfully
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Created the Top Level File - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/rtl/example_top.vhd
Created the Top Level File - C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/sim/sim_tb_top.v
The design output files are located in C:/Users/nagy/Documents/Work/ISE_Projects/DDRConv/Ram2Ddr_RefComp/ipcore_dir/tmp/_cg/ddr/example_design/rtl and ..example_design/par for rtl & ucf files respectively.
