2014.4:
 * Version 3.0 (Rev. 5)
 * Added bus interface definition for SYS_Rst, no functional changes

2014.3:
 * Version 3.0 (Rev. 4)
 * No changes

2014.2:
 * Version 3.0 (Rev. 4)
 * Removed revision control tags from source code comments, no functional changes

2014.1:
 * Version 3.0 (Rev. 3)
 * Updated constraints to support UltraScale
 * Internal device family name change, no functional changes

2013.4:
 * Version 3.0 (Rev. 2)
 * No changes

2013.3:
 * Version 3.0 (Rev. 2)
 * Support for Automotive Artix-7, Automotive Zynq, Defense Grade Artix-7, and Defense Grade Zynq devices at Production status

2013.2:
 * Version 3.0 (Rev. 1)
 * Repackaged to improve internal automation, no functional changes

2013.1:
 * Version 3.0
 * Vivado-only core, with no functional changes from version 2.00.b
 * There have been no functional or interface changes to this IP.  The version number has changed to support unique versioning in Vivado starting with 2013.1.

2012.4:
 * Version 2.00.b
 * No changes

2012.3:
 * Version 2.00.b
 * No changes

2012.2:
 * Version 2.00.b
 * Native Vivado release
 * Removed the usage of SRL16 and a 16 clock cycle reset after configuration

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