This VHDL project demonstrates the basic use of most of the Cmod-A7's general purpose I/O.
| Not Used | Used | |
|---|---|---|
| 2 user LEDs | X | |
| 1 tri-color LEDs | X | |
| 2 User Push Buttons | X | |
| 48 GPIO Pins | X | |
| 1 Pmod port | X | |
| Pins for XADC signals | X | |
| USB-UART Bridge | X | |
| 512 kB SRAM | X |
Cmod A7 15T GPIO Project Repository – GIT Repo ZIP Archive
Cmod A7 35T GPIO Project Repository – GIT Repo ZIP Archive
1) Follow the Using Digilent Github Demo Projects Tutorial. This is an HDL design project, and as such does not support Vivado SDK, select the tutorial options appropriate for a Vivado-only design. Return to this guide when prompted to check for extra hardware requirements and setup.
Important
Make sure that between the 15T and 35T versions of the project, you download the version that applies to your Cmod A7.
2) In order to fully use the demo, you will need to connect a serial terminal to your Cmod A7. Plug your board into your computer with a Micro USB cable and make sure the board has power. Then open a serial terminal (such as TeraTerm) on your computer. In the terminal application setup the serial port to connect to the appropriate port for your board, with a baud rate of 9600. Then return to the Github Projects Tutorial to finish programming and running the demo.
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