Arty OLED ACL Demo

This project demonstrates the use of the Arty board with expansion modules: Basic IO Shield and PmodACL. It is a simple Microblaze application.

This project demonstrates the use of the Arty board with expansion modules: Basic IO Shield and PmodACL. The project is implemented as a simple Microblaze application.

The behavior is as follows:

• Periodically, the acceleration on the 3 axes is read from PmodACL. The PmodACL is accessed over SPI and provides acceleration reading as 10 bits raw values.
• The raw values read from PmodACL are converted in values expressed in terms of g, considering that the 10 bits values correspond to the used +/- 2g acceleration range.
• The values in terms of g are formatted and displayed on the OLED display. The OLED display is accessed over SPI.

The sources folder contains two separate folders containing functions for ACL and OLED. These functions can be used in any project using these devices.

• Arty board
• Basic IO Shield
• PmodACL

• Vivado Design Suite & Xilinx SDK 2016.4
  • Version 2016.4 must be used to generate the project
• Digilent Board Support Files for Vivado
  • Follow the Vivado Board Files for Digilent 7-Series FPGA Boards guide on how to install Board Support Files for Vivado.

The picture from the top of this document shows the overall setup of this project.

1. Connect the PmodACL in the JB Pmod connector of Arty.

2. Connect the Basic IO Shield in the Arduino/chipKIT Shield connector of Arty.

3. Connect the USB cable in the PC and in the micro-USB connector J10 of Arty.

Arty Oled ACL Project Repository – ZIP Git Repo

1.1) Download the project linked in the download section and unzip it in the location of your choosing.

1.2) Generate the Arty Oled ACL project in the Projects folder by following this guide before continuing: How to Generate a Project from Digilent's Github

2.1) Click Generate Bitstream on the left hand menu towards the bottom. Vivado will run through both Run Synthesis and Run Implementation before it generates the bitstream automatically.

Note: If you want, you can click each step by itself in the order of Run Synthesis, Run Implementation and then Generate Bitstream.

3.1) Export the Microblaze project by going to File>Export>Export Hardware.

Click the check box to Include the bitstream, and Select <Local to Project> for “Export to” location.

This will export the needed files into the sdk folder in your project directory.

3.2) Launch SDK.
Click File>Launch SDK to launch Xilinx SDK. Select <Local to Project> for “Exported location” and “Workspace”.

4.1) In Xilinx SDK, select File>Import menu option, then expand the General node and click Existing Projects into Workspace. Select the sdk folder from within the project folder, and click OK. In the Import window be sure to have the Oled_Acl and Oled_Acl_bsp projects selected, click Finish to import the SDK project.

After this you should be able to see the Oled_Acl project in the Project explorer panel.

5.1) Click Xilinx Tools>Program FPGA and click Program. Xilinx SDK will then program the FPGA with a microblaze bit file.

6.1) Click on the Oled_Acl project and click the Green arrow button Run As / Launch on Hardware (System Debugger). The microblaze program will be programmed onto your Arty board.