~~NOTOC~~ 
    
====== Basys 3======
{{Digilent Infobox
| Store Page = https://digilent.com/shop/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/
| Manual = [[reference-manual]]
| Support = https://forum.digilentinc.com/forum/4-fpga/
| Title = Basys 3
| Subtitle = Artix-7 FPGA Trainer Board
| Header = Features
| Bullet = On-chip analog-to-digital converter
| Header = Key Specifications
| FPGA Part # = XC7A35T-1CPG236C
| Logic Cells = 33,280 in 5200 slices
| Block RAM = 1,800 Kbits
| DSP Slices = 90
| Internal clock = 450 MHz+
| Header = Connectivity and Onboard I/O
| Pmod Connectors = 3
| Switches = 16
| Buttons = 5
| User LED = 16
| 7-Seg Display = 4-Digit
| VGA = 12-bit
| USB = HID Host (KB/Mouse/Mass Storage)
| Header = Electrical
| Power = USB \\ 5v (Pins)
| Logic Level = 3.3v
| Header = Physical
| Width = 2.8 in
| Length = 4.8 in
| Header = Design Resources
| Mechanical Drawing = {{:reference:programmable-logic:basys-3:basys_3_dimensions.zip|DXF }}
}}


{{page>reference-manual}} \\ \\
 
 ===== Documentation =====
{{topic>basys-3 +doc -legacy}}

  * {{ :reference:programmable-logic:basys-3:basys-3_sch.pdf|Basys 3 Schematic (Rev. C)}}
  * {{ :reference:programmable-logic:basys-3:basys-3-sch-public-rev-d.pdf |Basys 3 Schematic (Rev. D)}}

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===== Tutorials =====

  * [[programmable-logic:guides:installing-vivado-and-vitis]]
    * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards.
  * [[programmable-logic:guides:getting-started-with-ipi]]
    * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs.
  * [[programmable-logic:guides:getting-started-with-vivado]]
    * Walks through using Vivado to create a simple design that blinks a single LED.
  * [[learn/programmable-logic/tutorials/pmod-ips/start]]
    * Digilent Pmod IPs can be used to control connected Pmods from baremetal software.
    * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older.

  * [[/learn/programmable-logic/tutorials/basys-3-programming-guide/start]]

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===== Example Projects =====
**Note:** //The latest version of Vivado supported by these projects is 2020.1.//

  * [[./demos/abacus]]
  * [[./demos/gpio]]
  * [[./demos/keyboard]]
  * [[./demos/xadc]]

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===== Additional Resources =====
  * [[http://www.xilinx.com/support/university/workshops.html | Xilinx Vivado Workshop Materials]]
  * 3D CAD file -- {{reference:programmable-logic:basys-3:basys3.zip|STP file}}
  * {{:reference:programmable-logic:basys-3:basys_3_dimensions.zip| Basys3 Mechanical Drawing }}
  * [[https://www.mhprofessional.com/9781259837906-usa-digital-system-design-with-fpga-implementation-using-verilog-and-vhdl-group | Digital System Design With FPGA: Implementation Using Verilog And VHDL]]
  * [[learn/programmable-logic/tutorials/use-flip-flops-to-build-a-clock-divider/start]]

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{{tag>programmable-logic programmable-logic-start basys-3 resource-center}}