~~NOTOC~~ ====== Arty A7 ====== {{Digilent Infobox | Store Page = https://digilent.com/shop/arty-a7-artix-7-fpga-development-board/ | Manual = [[reference-manual]] | Support = https://forum.digilentinc.com/forum/4-fpga/ | Title = Arty A7 | Subtitle = Artix-7 FPGA Development Board | Header = Features | Bullet = Programmable over JTAG and Quad-SPI Flash | Bullet = On-chip analog-to-digital converter | Header = Key Specifications | FPGA Part # = XC7A35TICSG324-1L (XC7A100TCSG324-1*) | Logic Slices = 5,200 (15,850*) | Block RAM = 1,800 Kbits (4,860* Kbits) | DSP Slices = 90 (240*) | DDR3 = 256 MB @ 667 MHz | Internal clock = 450 MHz+ | Quad-SPI Flash = 16 MB | Ethernet = 10/100 Mbps | Bullet = (*A7-100 variant value in parentheses where different) | Header = Connectivity and Onboard I/O | Pmod Connectors = 4 | Shield Connector = Arduino / chipKIT compatible | Switches = 4 | Buttons = 4 | Reset LED = 1 | User LED = 4 | User RGB LED = 4 | Header = Electrical | Power = USB \\ 7-15v (2.5mm coaxial) supply | Logic Level = 3.3v | Header = Physical | Width = 3.4 in | Length = 4.3 in | Header = Design Resources | Mechanical Drawing = {{:reference:programmable-logic:arty-a7:arty_a7.zip|DXF }} | Header = Product Compliance | HTC = 8471500150 | ECCN = EAR99 }} {{page>reference-manual}} \\ \\ ===== Documentation===== * [[/programmable-logic/arty-a7/reference-manual]] * [[/learn/programmable-logic/doc/github/digilent-xdc]] * [[/learn/programmable-logic/doc/datasheets/7-series-fpgas-overview]] * [[/learn/programmable-logic/doc/datasheets/artix-7-datasheet]] * {{/programmable-logic/arty-a7/arty-a7-e2-sch.pdf|Arty A7 Revision E.2 Schematic}} * {{reference/programmable-logic/arty-a7/arty_a7_sch.pdf|Arty A7 Revision E.0 Schematic}} * {{https://files.digilent.com/resources/programmable-logic/documents/S25FL127S_PCN.pdf|Product Change Notice - Flash Memory}} ---- ===== Tutorials ===== * [[programmable-logic:guides:installing-vivado-and-vitis]] * Walks through installing Vivado and Vitis, the development environments used to create hardware and software applications targeting Digilent FPGA development boards. * [[programmable-logic:guides:getting-started-with-ipi]] * Walks through using Vivado and Vitis to create a design in hardware and software that uses a processor to control buttons and LEDs. * [[programmable-logic:guides:getting-started-with-vivado]] * Walks through using Vivado to create a simple design that blinks a single LED. * [[learn/programmable-logic/tutorials/pmod-ips/start]] * Digilent Pmod IPs can be used to control connected Pmods from baremetal software. * It should be noted that not all Pmods are supported and that Pmod IPs are only supported in versions of Vivado 2019.1 and older. * [[programmable-logic/arty-a7/arty_a7_100_risc_v/start]] ---- ===== Example Projects ===== {{topic>arty-a7 +project}} ---- ===== Community Projects ===== * //Hackster Project//: [[https://projects.digilentinc.com/adam-taylor/arm-designstart-fpga-cortex-m1-environmental-monitor-fe4a69|Arm DesignStart FPGA Cortex-M1 Environmental Monitor]] * Created by Adam Taylor. * Contains instructions for using the ARM Cortex-M1 with the Arty S7. * **Note**: //While this project was created for the Arty S7, ARM's DesignStart FPGA materials also contain base projects for working with the Arty A7.// * **Note**: //Working with DesignStart FPGA requires a license. A free 90-day trial license can be obtained, as described in the guide.// * //Hackster Project//: [[https://projects.digilentinc.com/adam-taylor/arm-designstart-fpga-cortex-m3-based-robot-106bca|Arm DesignStart FPGA Cortex-M3-Based Robot]] * Created by Adam Taylor. * Contains instructions for using the ARM Cortex-M3 with the Arty S7. * **Note**: //While this project was created for the Arty S7, ARM's DesignStart FPGA materials also contain base projects for working with the Arty A7.// * **Note**: //Working with DesignStart FPGA requires a license. A free 90-day trial license can be obtained, as described in the guide.// * Digilent Forum user jmw created a Microblaze port of the [[https://github.com/jmwilson/Adafruit-GFX-Library_MicroBlaze|Adafruit GFX]] and [[https://github.com/jmwilson/Adafruit_SSD1306_MicroBlaze|Adafruit SSD1306]] libraries for the Arty, which likely can be made compatible with the Pmod OLED. The original Forum thread is available [[https://forum.digilentinc.com/topic/3407-adafruit-ssd1306-library-on-microblaze/|here]]. /* * [[https://forums.xilinx.com/t5/Xcell-Daily-Blog-Archived/Adam-Taylor-s-MicroZed-Chronicles-Part-221-How-to-boot-a/ba-p/802317|How to boot a MicroBlaze soft processor from non-volatile memory ]] */ * Arty A7 100T project using the Pmod ACL2, Pmod CLS, and Pmod 7SD created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20397-muxssd-driver-for-the-pmod-ssd/|Forum thread]] * Arty A7 100T project using the Pmod SF3 and Pmod CLS created by user Tim S. on the Digilent Forum [[https://forum.digilentinc.com/topic/20419-spi-memory-tester-ipi-bd-and-vhdl/|Forum thread]] /* {{Digilent Hackster | product = "arty-a7" }} */ ---- ===== Additional Resources ===== * [[:learn:programmable-logic:tutorials:arty-getting-started-with-microblaze-servers:|Arty Getting Started with Microblaze Servers]] * [[:learn:programmable-logic:tutorials:arty-programming-guide:|Arty Programming Guide]] * [[:learn:programmable-logic:tutorials:arty-base-system-design:|Arty Base System Design with Programmable RGB LEDs]] * [[:learn:programmable-logic:tutorials:htsspisf:|How to Store a Vivado SDK Project in SPI Flash]] * [[:learn:programmable-logic:tutorials:program_fpgas_through_multisim:|Programming FPGAs through Multisim]] * [[https://www.xilinx.com/support/university/workshops.html|Xilinx Vivado Workshop materials]] * [[https://www.avnet.com/shop/us/p/kits-and-tools/development-kits/avnet-engineering-services-ade--1/aes-a7mb-7a35t-g-3074457345628965502/|Avnet Arty Materials (Including Out-of-Box demo)]] * [[https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841844/ARTY+FreeRTOS+Web+Server|Xilinx ARTY FreeRTOS Web Server Demo]] * [[https://products.avnet.com/opasdata/d120001/medias/docus/10/PB-Artix-7%2035T%20FPGA%20Arty%20Evaluation%20Kit-v4.pdf|Avnet Product Brief]] - //REQUIRES REGISTRATION// * [[https://www.researchgate.net/profile/Sandro_Pinto2/publication/334151876_The_industry-first_secure_IoT_stack_for_RISC-V_a_research_project/links/5d1a8c9c92851cf4405c8ebf/The-industry-first-secure-IoT-stack-for-RISC-V-a-research-project.pdf|The industry-first secure IoT stack for RISC-V: a research project]] * [[https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-reference-manual/|SiFive RISC-V Freedom E300 Platform Getting Started Guide for Arty]] * [[https://www.sifive.com/documentation/freedom-soc/freedom-e300-platform-brief/|SiFive RISC-V Freedom E300 Platform Brief]] * [[https://www.digikey.com/eewiki/display/LOGIC/Digilent+Arty+A7+with+Xilinx+Artix-7+Implementing+SiFive+FE310+RISC-V |Arty A7 SiFive RISC-V FE310 Implementation Guide]] * [[https://github.com/Digilent/Arty/tree/master/Resources/Arty_MIG_DDR3|Arty Xilinx MIG Resources]] * {{:reference:programmable-logic:arty:arty_revc_cad.zip| Arty A7 3D CAD Model}} * {{:reference:programmable-logic:arty-a7:arty_a7.zip| Arty A7 Mechanical Drawing }} {{tag>programmable-logic programmable-logic-start arty-a7 resource-center}}